Complete Single-Conversion

Television Tuner

8

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IFVGA VOLTAGE GAIN vs. IFAGC VOLTAGE

IFAGC VOLTAGE (V)

0.5

1.0

1.5

2.0

2.5

3.0

10

20

30

40

50

60

+25

°C

-40

°C

+85

°C

IFVGA IM3 vs. IFAGC VOLTAGE

IFAGC VOLTAGE (V)

MAX3541 toc22

-80

-60

-40

-20

0.5

1.0

1.5

2.0

2.5

3.0

-60

-50

-40

-30

-20

IM3

Pin Description

Typical Operating Characteristics (continued)

PIN

NAME

DESCRIPTION

1

SCL

2

SDA

3, 10, 23, 28,

32, 33, 37,

41, 44

Power Supply Connections. Bypass each supply pin to ground with a 1000pF capacitor.

4

UHF_IN

UHF RF Input. Requires a DC-blocking capacitor.

5

VHF_IN

VHF RF Input. Requires a DC-blocking capacitor.

6

RFGND2

RF Ground. Bypass to the PCB’s ground plane with a 1000pF capacitor. Do not connect RFGND2

and RFGND3 together.

7

LEXT

8

RFGND3

RF Ground. Bypass to the PCB’s ground plane with a 1000pF capacitor. Do not connect RFGND2

and RFGND3 together.

9

RFAGC

RF VGA Gain Control Voltage. Accepts a DC voltage from 0.5V (minimum gain) to 3V (maximum gain).

11–22, 27, 31

GND

Ground. Connect to the PCB’s ground plane.

24

IFOUT2-

Inverting IF VGA Output. Connect to the input of an anti-aliasing filter. Requires a DC-blocking capacitor.

25

IFOUT2+

Noninverting IF VGA Output. Connect to the input of an anti-aliasing filter. Requires a DC-blocking capacitor.

26

IFAGC

IF VGA Gain Control Voltage. Accepts a DC voltage from 0.5V (minimum gain) to 3V (maximum gain).

29

IFIN-

Inverting IF VGA Input. Connect to the output of an IF-SAW filter.

30

IFIN+

Noninverting IF VGA Input. Connect to the output of an IF-SAW filter.

34

IFOVLD

IF Overload Detector Open-Collector Output. Requires a 10k

35

IFOUT1+

Noninverting IF LNA Output. Requires a DC-blocking capacitor.

36

IFOUT1-

Inverting IF LNA Output. Requires a DC-blocking capacitor.

38

LDO

VCO LDO Bypass. Bypass to ground with a 0.47μF capacitor.