µP Supervisory Circuits with Windowed

(Min/Max) Watchdog and Manual Reset

_______________________________________________________________________________________

5

500

µs/div

MAX6323/24-10

WDI

2V/div

2V/div

WDPO

FAST WATCHDOG TIMEOUT PERIOD

MAX6323AUT23

5ms/div

MAX6323/24-11

WDI

2V/div

2V/div

WDPO

SLOW WATCHDOG TIMEOUT PERIOD

MAX6323AUT23

Typical Operating Characteristics (continued)

Pin Description

for the duration of the reset timeout period. The MAX6323 has a push-pull output and the MAX6324 has an

open-drain output. Connect a pullup resistor from RESET to any supply voltage up to +6V.

Watchdog Pulse Output. The open-drain WDPO output is pulsed low for 1ms (typ) upon detection of a fast

or slow watchdog fault. WDPO is only active when RESET is high.

WDPO

5

RESET

6

(min) capacitor.

4

Watchdog Input. The internal watchdog timer clears to zero on the falling edge of WDI or when RESET goes

high. If WDI sees another falling edge within the factory-trimmed watchdog window, WDPO will remain

unasserted. Transitions outside this window, either faster or slower, will cause WDPO to pulse low for 1ms

(typ).

WDI

3

PIN

Ground

GND

2

Active-Low, Manual Reset Input. When MR is asserted low, RESET is asserted low, the internal watchdog

timer is reset to zero, and WDPO is reset to high impedance (open drain). After the rising edge of MR,

MR

1

FUNCTION

NAME