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DS1321 Datasheet(PDF) 1 Page - Dallas Semiconductor |
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DS1321 Datasheet(HTML) 1 Page - Dallas Semiconductor |
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1 / 12 page  1 of 12 091404 FEATURES § Converts CMOS SRAM into nonvolatile memory § Unconditionally write-protects SRAM when VCC is out of tolerance § Automatically switches to battery backup supply when VCC power failure occurs § Flexible memory organization - Mode 0: 4 banks with 1 SRAM each - Mode 1: 2 banks with 2 SRAMs each - Mode 2: 1 bank with 4 SRAMs each § Monitors voltage of a lithium cell and provides advanced warning of impending battery failure § Signals low-battery condition on active low Battery Warning output signal § Resets processor when power failure occurs and holds processor in reset during system power-up § Optional 5% or 10% power-fail detection § 16-pin DIP, 16-pin SOIC and 20-pin TSSOP packages § Industrial temperature range of -40°C to +85°C PIN DESCRIPTION VCCI - +5V Power Supply Input VCCO - SRAM Power Supply Output VBAT - Backup Battery Input A, B - Address Inputs CEI1 - CEI4 - Chip Enable Inputs CEO1 - CEO4 - Chip Enable Outputs TOL - VCC Tolerance Select BW - Battery Warning Output (Open Drain) RST - Reset Output (Open Drain) MODE - Mode Input GND - Ground NC - No Connection PIN ASSIGNMENT DS1321 Flexible Nonvolatile Controller with Lithium Battery Monitor www.dalsemi.com 1 2 3 4 20 19 18 17 5 6 7 8 9 10 11 12 13 14 15 16 NC DS1321E 20-Pin TSSOP VCCI RST BW CEO1 CEO2 NC CEO3 CEO4 NC MODE VCCO VBAT TOL CEI1 CEI2 NC A/CEI3 B/CEI4 GND 1 2 3 4 16 15 14 13 5 6 7 89 10 11 12 VCCI RST BW CEO1 CEO2 CEO3 CEO4 MODE VCCO VBAT TOL CEI1 CEI2 A/CEI3 B/CEI4 GND DS1321 16-Pin DIP (300-mil) 1 2 3 4 16 15 14 13 5 6 7 89 10 11 12 VCCI RST BW CEO1 CEO2 CEO3 CEO4 MODE VCCO VBAT TOL CEI1 CEI2 A/CEI3 B/CEI4 GND DS1321S 16-Pin SOIC (150-mil) |
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Similar Description - DS1321 |
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