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VND5E050J-E Datasheet(PDF) 11 Page - STMicroelectronics |
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VND5E050J-E Datasheet(HTML) 11 Page - STMicroelectronics |
11 / 40 page VND5E050K-E Electrical specifications Doc ID 14472 Rev 3 11/40 tPOL Delay between input falling edge and status rising edge in open-load condition IOUT = 0A (see Figure 4) 200 500 1200 µs VOL Openload off-state voltage detection threshold VIN = 0V; 2 4 V tDSTKON Output short circuit to VCC detection delay at turn-off See Figure 4 180 tPOL µs IL(off2) Off-state output current(1) VIN= 0V; VOUT= 4V (see Section 3.4: Open-load detection in off-state) -75 0 µA td_vol Delay response from output rising edge to status falling edge in open-load VIN= 0V; VOUT= 4V 20 µs 1. For each channel. Table 10. Logic input Symbol Parameter Test conditions Min. Typ. Max. Unit VIL Input low level 0.9 V IIL Low level input current VIN =0.9 V 1 µA VIH Input high level 2.1 V IIH High level input current VIN = 2.1 V 10 µA VI(hyst) Input hysteresis voltage 0.25 V VICL Input clamp voltage IIN = 1mA IIN = -1mA 5.5 -0.7 7V V VSDL STAT_DIS low level voltage 0.9 V ISDL Low level STAT_DIS current VSD = 0.9 V 1 µA VSDH STAT_DIS high level voltage 2.1 V ISDH High level STAT_DIS current VSD = 2.1 V 10 µA VSD(hyst) STAT_DIS hysteresis voltage 0.25 V VSDCL STAT_DIS clamp voltage ISD=1mA ISD=-1mA 5.5 -0.7 7V V Table 9. Openload detection (8V<VCC<18V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit |
Similar Part No. - VND5E050J-E_09 |
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Similar Description - VND5E050J-E_09 |
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