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TBU-CX065-VTC-WH Datasheet(PDF) 4 Page - Bourns Electronic Solutions

Part # TBU-CX065-VTC-WH
Description  TBU짰 High-Speed Protectors
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Manufacturer  BOURNS [Bourns Electronic Solutions]
Direct Link  http://www.bourns.com
Logo BOURNS - Bourns Electronic Solutions

TBU-CX065-VTC-WH Datasheet(HTML) 4 Page - Bourns Electronic Solutions

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Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TBU-CX Series - TBU® High-Speed Protectors
Reflow Profile
Profile Feature
Pb-Free Assembly
Average Ramp-Up Rate (Tsmax to Tp)
3 °C/sec. max.
Preheat
- Temperature Min. (Tsmin)
- Temperature Max. (Tsmax)
- Time (tsmin to tsmax)
150 °C
200 °C
60-180 sec.
Time maintained above:
- Temperature (TL)
- Time (tL)
217 °C
60-150 sec.
Peak/Classification Temperature (Tp)
260 °C
Time within 5 °C of Actual Peak Temp. (tp)
20-40 sec.
Ramp-Down Rate
6 °C/sec. max.
Time 25 °C to Peak Temperature
8 min. max.
Recommended Pad Layout
Thermal Resistance vs Additional PCB Cu Area
Added Cu Area (Sq. In.)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
120
100
80
60
40
20
0
TBU® High-Speed Protectors have a 100 % matte-tin termination
finish. For improved thermal dissipation, the recommended layout
uses PCB copper areas which extend beyond the exposed solder
pad. The exposed solder pads should be defined by a solder mask
which matches the pad layout of the TBU® device in size and
spacing. It is recommended that they should be the same dimen-
sion as the TBU® pads but if smaller solder pads are used, they
should be centered on the TBU® package terminal pads and not
more than 0.10-0.12 mm (0.004-0.005 in.) smaller in overall width
or length. Solder pad areas should not be larger than the TBU® pad
sizes to ensure adequate clearance is maintained. The recom-
mended stencil thickness is 0.10-0.12 mm (0.004-0.005 in.) with a
stencil opening size 0.025 mm (0.0010 in.) less than the solder pad
size. Extended copper areas beyond the solder pad significantly
improve the junction to ambient thermal resistance, resulting in
operation at lower junction temperatures with a corresponding
benefit of reliability. All pads should soldered to the PCB, includ-
ing pads marked as NC or NU but no electrical connection should
be made to these pads. For minimum parasitic capacitance, it is
recommended that signal, ground or power signals are not routed
beneath any pad.
Dark grey areas show added PCB copper area for better
thermal resistance.
54
3
2
1
54
2
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