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NOT

RECOMMENDED

FOR

NEW

DESIGNS

DIN9

(MSB)

(MSB)

(LSB)

(LSB)

DIN8

DIN7

DIN6

DIN5

DIN4

DIN3

DIN2

DIN1

DIN0

CLK

GS9001

TOP VIEW

33

32

31

30

29

28

27

26

25

24

23

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

44

43

42

41

40

39

38

37

36

35

34

DOUT9

DOUT8

DOUT7

DOUT6

DOUT5

DOUT4

DOUT3

DOUT2

DOUT1

DOUT0

INTERRUPT

Fig. 1 GS9001 EDH Coprocessor Pin Connections

Input S1

Input S0

Output FL1

Output FL0

00

EDA Full Field

EDH Full Field

01

UES (See Note)

EDH Active Picture

10

EDA Ancillary

EDH Ancillary

11

IDA (See Note)

IDH (See Note)

NOTE:

The UES, IDH and IDA flags that appear on pins FL0 and FL1 as shown in Table 2, represent the sum of each

corresponding flag for active picture, full field and ancillary. UES indication can also be used to identify the absence

of EDH implementation in the upstream equipment.

Table 1. Selection of Field and Video standard signals on F2, F1, F0 pins

Table 2. Selection of Error status flags to display

Input

Output F2

Output F1

Output F0

Field/Std

0

NTSC (0) / PAL (1)

D1 (0) / D2 (1)

*

13.5 MHz Y (0) / 18 MHz Y (1)

1

Field Bit 2

Field Bit 1

Field Bit 0

D2: 4ƒ

sc

sampling