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GS9025ACTME3 Datasheet(PDF) 3 Page - Gennum Corporation

Part # GS9025ACTME3
Description  Serial Digital Receiver
Download  18 Pages
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Manufacturer  GENNUM [Gennum Corporation]
Direct Link  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS9025ACTME3 Datasheet(HTML) 3 Page - Gennum Corporation

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GENNUM CORPORATION
522 - 75 - 05
3 of 18
SS[2:0] Input Voltage
HIGH, Manual Mode
2
-
-
V
3
LOW, Manual Mode
-
-
0.8
CLK_EN Source Current
Low, VIL = 0V
-
26
55
µA
1
NOTES
1. TYPICAL - measured on EB9025A board.
2. VDIFF is the differential input signal swing.
3. LOCK is an open collector output and requires an external pull-up
resistor.
4. Pins SS[2:0] are outputs in AUTO mode and inputs in MANUAL mode.
5. If OEM_TEST is permanently enabled, operating temperature range is
limited from 0°C to 60°C inclusive.
TEST LEVELS
1. Production test at room temperature and nominal supply
voltage with guardbands for supply and temperature
ranges.
2. Production test at room temperature and nominal supply
voltage with guardbands for supply and temperature
ranges using correlated test.
3. Production test at room temperature and nominal supply
voltage.
4. QA sample test.
5. Calculated result based on Level 1,2, or 3.
6. Not tested. Guaranteed by design simulations.
7. Not tested. Based on characterization of nominal parts.
8. Not tested. Based on existing design/characterization
data of similar product.
9. Indirect test.
AC ELECTRICAL CHARACTERISTICS
VCC = 5.0V, VEE = 0V, TA = 0° to 70°C unless otherwise stated, RLF = 1.8k, CLF1 = 15nF, CLF2 = 3.3pF
PARAMETER
CONDITIONS
MIN
TYPICAL
1
MAX
UNITS
NOTES
TEST
LEVEL
Serial Data Rate
SDI
143
-
540
Mb/s
3
Maximum Equalizer Gain
@ 200MHz
-
40
-
dB
6
Additive Jitter
[Pseudorandom (2
23 -1)]
270Mb/s, 300m
(Belden 8281)
-
300
-
ps p-p
2, 8
9
540Mb/s, 100m
(Belden 8281)
-
275
-
Intrinsic Jitter
[Pseudorandom (2
23 -1)]
270Mb/s
-
185
see Figure 12
ps p-p
2, 7
4
540Mb/s
-
164
Intrinsic Jitter
[Pathological (SDI checkfield)]
270Mb/s
-
462
see Figure 13
ps p-p
2, 7
3
360Mb/s
-
308
540Mb/s
-
260
Input Jitter Tolerance
270Mb/s
0.40
0.56
-
UI p-p
3, 7
9
540Mb/s
0.32
0.43
-
Lock Time -
Synchronous Switch
tswitch < 0.5µs, 270Mb/s
-
1
-
µs
4
7
0.5µs< tswitch <10ms
-
1
-
ms
tswitch > 10 ms
-
4
-
ms
Lock Time -
Asynchronous Switch
Loop Bandwidth
= 6MHz @ 540Mb/s
-10
-
ms
5
7
DC ELECTRICAL CHARACTERISTICS (Continued)
VCC = 5.0V, TA = 0° to 70°C unless otherwise stated, RLF = 1.8k, CLF1 = 15nF, CLF2 = 3.3pF
PARAMETER
CONDITION
MIN
TYPICAL
1
MAX
UNITS
NOTES
TEST
LEVEL


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