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DG412HSDY Datasheet(PDF) 7 Page - Vishay Siliconix |
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DG412HSDY Datasheet(HTML) 7 Page - Vishay Siliconix |
7 / 17 page Document Number: 72053 S11-0179-Rev. C, 07-Feb-11 www.vishay.com 7 Vishay Siliconix DG411HS, DG412HS, DG413HS SCHEMATIC DIAGRAM (Typical Channel) TEST CIRCUITS Figure 1. Level Shift/ Drive VIN VL S V+ GND V- D V- V+ Figure 2. Switching Time 0 V Logic Input Switch Input* 3 V 50 % 0 V VS tr < 5 ns tf < 5 ns 90 % tOFF tON VO Note: Logic input waveform is inverted for switches that have the opposite logic sense control CL (includes fixture and stray capacitance) V+ IN RL RL + rDS(on) VO = VS SD - 15 V VO GND ± 10 V VL CL 35 pF V- RL 300 Ω + 15 V + 5 V 90 % Figure 3. Break-Before-Make (DG413HS) 0 V Logic Input Switch Switch Output 3 V 50 % 0 V Output 0 V 90 % VO2 VO1 90 % VS1 VS2 tD tD VO2 CL (includes fixture and stray capacitance) V+ S2 V- S1 VL VS2 IN2 D2 VS1 RL2 300 Ω D1 VO1 CL2 35 pF -15 V GND + 5 V + 15 V RL1 300 Ω CL1 35 pF IN1 |
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