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DG9052DQ-T1-E3 Datasheet(PDF) 10 Page - Vishay Siliconix |
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DG9052DQ-T1-E3 Datasheet(HTML) 10 Page - Vishay Siliconix |
10 / 13 page www.vishay.com 10 Document Number: 73410 S11-1066-Rev. B, 30-May-11 Vishay Siliconix DG9051, DG9052, DG9053 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TEST CIRCUITS Figure 3. Break-Before-Make Interval 50 % 90 % Logic Input Switch Output VO VS tOPEN tr < 5 ns tf < 5 ns 0 V 3 V 0 V V+ GND V- 35 pF V- A2 Db, D All S and Da 300 VO 50 A1 A0 VS1 EN Return to Specifications: Single Supply 12 V Dual Supply V+ = 5 V, V- = - 5 V Single Supply 5 V Single Supply 3 V Figure 4. Charge Injection A0 A1 A2 VO V+ GND V- D Vg Rg SX CL 1 nF Channel Select 3 V 0 V OFF ON Logic Input Switch Output VO VO is the measured voltage due to charge transfer error Q, when the channel turns off. Q = CL x VO OFF V+ V- EN Figure 5. Off Isolation RL 50 VOUT V+ GND V- A2 D A1 A0 S8 SX Rg = 50 Off Isolation = 20 log VOUT VIN VIN V+ V- EN Figure 6. Crosstalk RL 50 VOUT V+ GND V- A2 D A1 A0 S8 SX Rg = 50 Crosstalk = 20 log VOUT VIN VIN S1 V+ V- EN RIN 50 |
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