LV766106F

No.A1893-3/41

μ-Controller Chip Absolute maximum ratings at Ta=25

°C, VSS=0V

Limits

Parameter

Symbol

Pins

Conditions

VDD[V]

min

typ

max

unit

Maximum Supply voltage

VDD max

CpuVDD

-0.3

~

+6.0

Input voltage

VI

XT1,RES#

-0.3

~

VDD+0.3

VO1

XT2,FILT

-0.3

~

VDD+0.3

Output voltage

VO2

CpuVDD2

-0.3

~

3.3V+0.3

Input/output voltage

VIO

Ports0,1

-0.3

~

VDD+0.3

V

Peak output

current

IOPH

Ports04~07,1

･

CMOS output

･

For each pin.

-10

Mean Output

current

IOMH

Ports04~07,1

･

CMOS output

･

For each pin.

-1

High level

output

current

Total output

current

ΣIOAH

Ports04~07,1

The total of all

pins.

-25

Peak output

current

IOPL

Ports0,1

For each pin

20

IOML1

P02,P03,P06,P07

Ports1

For each pin

1

Mean output

current

IOML2

P00,P01,P04,P05

For each pin

8

ΣIOAL1

P02,P03,P06,P07

Ports1

The total of all

pins.

45

Low level

output

current

Total output

Current

ΣIOAL2

P00,P01,P04,P05

The total of all

pins.

16

mA

μ-Conttoller Chip Recommended operating range at Ta=-10

°C to +65°C, VSS=0V

Limits

Parameter

Symbol

Pins

Conditions

VDD[V]

min.

typ.

max.

unit

Operating supply

voltage range

VDD

CpuVDD

0.229µs≤tCYC≤200µs

4.5

5.5

Hold voltage

VHD

CpuVDD

RAMs and the registers data are

kept in HOLD mode.

2.0

5.5

VIH1

Ports0,1,

P00 port input

/interrupt

4.5 to 5.5

0.3VDD

+0.7

VDD

VIH2

Port00

Watch-dog

timer

4.5 to 5.5

0.9VDD

VDD

High level input

Voltage

VIH3

RES#

4.5 to 5.5

0.75VDD

VDD

VIL1

Ports0,1,

P00 port input

/interrupt

4.5 to 5.5

VSS

0.1VDD

+0.4

VIL2

Port00

Watch-dog timer

4.5 to 5.5

VSS

0.8VDD

-1.0

Low level input

Voltage

VIL3

RES#

4.5 to 5.5

VSS

0.25VDD

V

tCYC1

All functions operating

4.5 to 5.5

0.231

Operation cycle time

(*3)

tCYC2

OSD and Data slicer are not

operating

4.5 to 5.5

0.231

200

µs

FmVCO1

Built-in VCO1

Oscillation System clock

4.5 to 5.5

13.0

OCKSEL=0

12.5

FmVCO2

(*4)

Built-in VCO2

oscillation

OSD clock

OCKSEL=1

4.5 to 5.5

16.6

FmRC

Built-in RC oscillation

4.5 to 5.5

0.3

1.0

2.0

MHz

Oscillation

frequency range

FsX’tal

(*4)

XT1(P07),

XT2(P06)

At the 32.768KHz crystal

Oscillating See the figure1

4.5 to 5.5

32.768

KHz

Oscillation

stabilizing time

tmsVCO

･

after the HOLD mode

･

Power-On

4.5 to 5.5

300

mS

(Note) FLASH-ROM erase/write temperature range :Ta=25±2

°C（VDD=4.5 to 5.5V）

(*3) Relational expression between Tcyc and oscillation frequency;

1/1 frequency dividing: 3/FmVCO1, 1/2 frequency dividing: 6/FVCO1.

(*4) OCKSEL is the selectable register for OSD clock frequency. (See the LC873600 users manual for details.)

(*5)When the base timer count of clock accuracy is necessary , use the port terminal (two ports) as the crystal oscillation.

(See the [12 μ-Controller Chip Crystal Oscillation Circuit and Sample Characteristics] for details.)