ISL6146

7

FN7667.0

December 16, 2011

EN/UVLO Falling to GATE Falling Delay

2

4

µs

EN/OVP Rising to GATE Falling Delay

2

4

µs

Ren_h

ENABLE Pull-Down Resistor

ISL6146A

2

MΩ

Ren_l

ENABLE Pull-Up Resistor

ISL6146B

2

MΩ

Vadj

ADJ Pin Voltage

0.4

V

Radj

ADJ Pull-Up Resistor

3.85

MΩ

OTS

Over-Temperature Sense

Fault signals in operation

140

°C

Over-Temperature Sense Hysteresis

20

°C

HTS

High Temperature Sense

Fault signals upon enabling

125

°C

NOTE:

9. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

temperature range, -40°C to +125°C. (Continued)

SYMBOL

PARAMETERS

TEST CONDITIONS

MIN

(Note 9)

TYP

MAX

(Note 9)

UNITS