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W25X40BL Datasheet(PDF) 4 Page - Winbond |
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W25X40BL Datasheet(HTML) 4 Page - Winbond |
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4 / 55 page  W25X40BL - 4 - 1. GENERAL DESCRIPTION The W25X40BL (4M-bit) Serial Flash memories provides a storage solution for systems with limited space, pins and power. The 25X series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code download applications as well as storing voice, text and data. The devices operate on a single 2.3V to 3.6V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages. The W25X40BL arrays are organized into 2,048 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time using the Page Program instruction. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25X40BL has 128 erasable 4KB sectors and 8 erasable 64KB blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25X40BL supports the standard Serial Peripheral Interface (SPI), and a high performance dual output as well as Dual I/O SPI: Serial Clock, Chip Select, Serial Data DI (I/O0), DO (I/O1). SPI clock frequencies of up to 50MHz (2.3-3.6V) and 80MHz (2.7-3.6V) are supported allowing equivalent clock rates of 100MHz (2.3-3.6V) and 160MHz (2.7-3.6V) when using the Fast Read Dual I/O instruction. These transfer rates are comparable to those of 8 and 16-bit Parallel Flash memories. A Hold pin, Write Protect pin and programmable write protect, with top or bottom array control features, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification. 2. FEATURES • Family of Serial Flash Memories – W25X40BL: 4M-bit/512K-byte (524,288) – 256-bytes per programmable page – Uniform 4KB Sectors, 32KB & 64KB Blocks • SPI with Single / Dual Outputs / Dual I/O – Clock, Chip Select, Data I/O, Data Out – Optional Hold function for SPI flexibility • Data Transfer up to 160M-bits / second – Clock operation to 80MHz – Fast Read Dual I/O instruction – Auto-increment Read capability • Efficient “Continuous Read Mode” – Low Instruction overhead – Continuous Read – As few as 8 clocks to address memory – Allows true XIP (execute in place) operation • Software and Hardware Write Protection – Write-Protect all or portion of memory – Enable/Disable protection with /WP pin – Top or bottom array protection – Volatile & Non-volatile Status Register Bits • Flexible Architecture with 4KB sectors – Sector Erase (4K-byte) – Block Erase (32K and 64K-byte) – Page program up to 256 bytes <1ms – More than 100,000 erase/write cycles – More than 20-year data retention • Low Power Consumption, Wide Temperature Range – Single 2.3 to 3.6V supply – 4mA active current, 1µA Power-down (typ) – -40° to +85°C operating range • Space Efficient Packaging – 8-pin SOIC 150 / 208-mil, VSOP 150-mil – 8-pad WSON 6x5-mm, USON 2x3-mm – 8-pin PDIP 300-mil |
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