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NVT2001 Datasheet(PDF) 2 Page - NXP Semiconductors |
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NVT2001 Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 23 page NVT2001_NVT2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 26 October 2011 2 of 23 NXP Semiconductors NVT2001; NVT2002 Bidirectional voltage level translator Low 3.5 ON-state connection between input and output ports provides less signal distortion 5 V tolerant I/O ports to support mixed-mode signal operation High-impedance An and Bn pins for EN = LOW Lock-up free operation Flow through pinout for ease of printed-circuit board trace routing ESD protection exceeds 4 kV HBM per JESD22-A114 and 1000 V CDM per JESD22-C101 Packages offered: TSSOP, XQFN, XSON 3. Ordering information [1] ‘X’ will change based on date code. [2] GTL2002 = NVT2002. 4. Functional diagram Table 1. Ordering information Tamb = 40 C to +85 C. Type number Topside mark Number of bits Package Name Description Version NVT2001GM N1X[1] 1 XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm SOT886 NVT2002DP[2] N2002 2 TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1 NVT2002GD[2] N02 2 XSON8U plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 2 0.5 mm SOT996-2 NVT2002GF[2] N2 2 XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 1 0.5 mm SOT1089 Fig 1. Logic diagram of NVT2001; NVT2002 (positive logic) 002aae132 A1 An VREFA GND VREFB B1 Bn EN SW SW NVT20xx |
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