8

8285DS–AVR–06/11

ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P

Port G also serves the functions of various special features of the

2.3.10

Port H (PH7:PH0)

Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port H output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port H pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port H pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Po rt

H

al so

ser v e s

t h e

f u nct i o n s

o f

va ri ou s

sp eci a l

f e at u r e s

of

t h e

2.3.11

Port J (PJ6:PJ0)

Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port J output buffers have symmetrical drive characteristics with both high sink and source capa-

bility. As inputs, Port J pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port J pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Por t

J

also

se rve s

th e

fun c tion s

o f

va riou s

s pec ia l

fe atu r es

of

th e

2.3.12

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

2.3.13

XTAL1

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

2.3.14

XTAL2

Output from the inverting Oscillator amplifier.

2.3.15

AVCC

AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-

nected to V

through a low-pass filter.

2.3.16

AREF

This is the analog reference pin for the A/D Converter.