epc100

Connection Diagrams

Top View

CS

OUTN/

SO

PD

GND

VDD

EN/

SI

LED/

SCK

VDD33

AOUT/

OUTH

VDD18

3

2

1

10

5

4

7

6

8

9

PIN Connections QFN16-VEED-

1VN4

LST

Top View

28.01.2010

Page 1

File: Unbenannt

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10-Pin Chip Scale Package (CSP)

16-Pin QFN Package

10-Pin

CSP

16-Pin

QFN

PIN Name

Type

Description

1

9

Power supply Positive power supply for regulator and positive terminal of the 2-wire interface.

2

7

GND

Power supply Negative power supply pin.

3

6

PD

Analog Input

Photo diode input.

4

4

CS

Digital Input

SPI Interface: Chip Select. Active low, with pull up

5

2

AOUT

OUTH

Analog Out

Digital Out

Amplified and filtered signal of the photo diode (push-pull) or

light reserve output (open drain) with 50 % threshold voltage above the threshold of the

OUT output.

6

1

SO

Digital Output SPI Interface: Serial out

7

15

SI

Digital Input

SPI Interface: Serial input

8

14

SCK

Digital Input

SPI Interface: Shift Clock

9

12

Power supply

Decoupling

power supply filter capacitor is connected to this pin.

10

10

Analog Out

1.8 V regulator output. Do not use this pin, except for a decoupling capacitor.

n/a

3

NC

Not connected. Connect this pin with VSS.

n/a

5

NC

Not connected. Connect this pin with VSS.

n/a

8

NC

Not connected. Connect this pin with VSS.

n/a

11

NC

Not connected. Connect this pin with VSS.

n/a

13

NC

Not connected. Connect this pin with VSS.

n/a

16

NC

Not connected. Connect this pin with VSS.

© 2011 ESPROS Photonics Corporation

Characteristics subject to change without notice

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Datasheet epc100 - V2.1

www.espros.ch