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5P49EE602NLGI8 Datasheet(PDF) 3 Page - Integrated Device Technology

Part # 5P49EE602NLGI8
Description  VERSACLOCK짰 LOW POWER CLOCK GENERATOR
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

5P49EE602NLGI8 Datasheet(HTML) 3 Page - Integrated Device Technology

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IDT5P49EE602
VERSACLOCK® LOW POWER CLOCK GENERATOR
EEPROM CLOCK GENERATOR
IDT™ VERSACLOCK® LOW POWER CLOCK GENERATOR
3
IDT5P49EE602 REV C 061110
Pin Assignment
Pin Descriptions
Pin Name
Pin #
I/O
Pin Type
Pin Description
OUT3
1
O
Adjustable
Configurable clock output 3. Single-ended output voltage levels
are register controlled by either VDDO1, VDDO2 or VDDO3.
OUT2
2
O
Adjustable
Configurable clock output 2. Single-ended output voltage levels
are register controlled by either VDDO1, VDDO2 or VDDO3.
SEL0
3
I
LVTTL
Configuration select pin. Weak internal pull down resistor.
VDDO1
4
Power
Device power supply. Connect to 1.8 to 3.3V. Using register
settings, select output voltage levels for OUT0-OUT4. VDDO1
must be greater than or equal to both VDDO2 and VDDO3.
X132k
5
I
LVTTL
32kHz CRYSTAL_IN -- Reference crystal input
X232k
6
O
LVTTL
32kHz CRYSTAL_OUT -- Reference crystal feedback.
VDDx
7
Power
Crystal oscillator power supply. Connect to 1.8V. Use filtered
analog power supply if available.
GND
8
Power
Connect to Ground.
VDD
9
Power
Device power supply. Connect to 1.8V.
VDDO2
10
Power
Device power supply. Connect to 1.8 to 3.3V. Using register
settings, select output voltage levels for OUT0-OUT3. VDDO2
must be equal or less than VDDO1.
OUT1
11
O
Adjustable
Configurable clock output 1. Single-ended output voltage levels
are register controlled by either VDDO1, VDDO2 or VDDO3.
SEL1
12
I
LVTTL
Configuration select pin. Weak internal pull down resistor.
1
7
24- pin QFN
19
13
SEL0
VDDO1
VDD
X232k
X132k
OUT2
GND
OUT3
OUT0
VDDO3
SCLK
OUT4B


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