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2308-4DCGI Datasheet(PDF) 4 Page - Integrated Device Technology |
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2308-4DCGI Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 13 page 4 COMMERCIALANDINDUSTRIALTEMPERATURERANGES IDT2308 3.3V ZERO DELAY CLOCK MULTIPLIER ZERO DELAY AND SKEW CONTROL To close the feedback loop of the IDT2308, the FBK pin can be driven from any of the eight available output pins. The output driving the FBK pin will be driving a total load of 7pF plus any additional load that it drives. The relative loading of this output (with respect to the remaining outputs) can adjust the input-output delay. For applications requiring zero input-output delay, all outputs including the one providing feedback should be equally loaded. If input-output delay adjustments are required, use the Output Load Difference Chart to calculate loading differences between the feedback output and remaining outputs. Ensure the outputs are loaded equally, for zero output-output skew. REF TO CLKA/CLKB DELAY vs. OUTPUT LOAD DIFFERENCE BETWEEN FBK PIN AND CLKA/CLKB PINS OUTPUT LOAD DIFFERENCE BETWEEN FBK PIN AND CLKA/CLKB PINS ( pF) 1500 1000 500 0 -500 -1000 -1500 -30 -25 -20 -15 -10 -5 05 10 15 20 25 30 |
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