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IDT82P2282PFBLANK Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT82P2282PFBLANK Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 381 page  IDT82P2282 DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER Table of Contents 4 August 20, 2009 3.8.2.3.3 National Bit Extraction ................................................................................................................................... 46 3.8.2.3.4 National Bit Codeword Extraction .................................................................................................................. 46 3.8.2.3.5 Extra Bit Extraction ........................................................................................................................................ 46 3.8.2.3.6 Remote Signaling Multi-Frame Alarm Indication Bit Extraction ..................................................................... 46 3.8.2.3.7 Sa6 Code Detection Per ETS 300 233 .......................................................................................................... 46 3.8.2.4 V5.2 Link .......................................................................................................................................................................... 47 3.8.2.5 Interrupt Summary ............................................................................................................................................................ 47 3.9 PERFORMANCE MONITOR ......................................................................................................................................................................... 49 3.9.1 T1/J1 Mode ...................................................................................................................................................................................... 49 3.9.2 E1 Mode .......................................................................................................................................................................................... 51 3.10 ALARM DETECTOR ..................................................................................................................................................................................... 53 3.10.1 T1/J1 Mode ...................................................................................................................................................................................... 53 3.10.2 E1 Mode .......................................................................................................................................................................................... 55 3.11 HDLC RECEIVER .......................................................................................................................................................................................... 56 3.11.1 HDLC Channel Configuration ........................................................................................................................................................ 56 3.11.2 HDLC Mode ..................................................................................................................................................................................... 56 3.12 BIT-ORIENTED MESSAGE RECEIVER ....................................................................................................................................................... 59 3.13 INBAND LOOPBACK CODE DETECTOR (T1/J1 ONLY) ............................................................................................................................ 59 3.14 ELASTIC STORE BUFFER ........................................................................................................................................................................... 60 3.15 RECEIVE CAS/RBS BUFFER ...................................................................................................................................................................... 60 3.15.1 T1/J1 Mode ...................................................................................................................................................................................... 60 3.15.2 E1 Mode .......................................................................................................................................................................................... 61 3.16 RECEIVE PAYLOAD CONTROL .................................................................................................................................................................. 63 3.17 RECEIVE SYSTEM INTERFACE .................................................................................................................................................................. 65 3.17.1 T1/J1 Mode ...................................................................................................................................................................................... 65 3.17.1.1 Receive Clock Master Mode ............................................................................................................................................ 65 3.17.1.1.1 Receive Clock Master Full T1/J1 Mode ......................................................................................................... 65 3.17.1.1.2 Receive Clock Master Fractional T1/J1 Mode ............................................................................................... 66 3.17.1.2 Receive Clock Slave Mode .............................................................................................................................................. 66 3.17.1.3 Receive Multiplexed Mode ............................................................................................................................................... 67 3.17.1.4 Offset ................................................................................................................................................................................ 67 3.17.1.5 Output On RSDn/MRSD & RSIGn/MRSIG ....................................................................................................................... 70 3.17.2 E1 Mode .......................................................................................................................................................................................... 70 3.17.2.1 Receive Clock Master Mode ............................................................................................................................................ 70 3.17.2.1.1 Receive Clock Master Full E1 Mode ............................................................................................................. 70 3.17.2.1.2 Receive Clock Master Fractional E1 Mode ................................................................................................... 70 3.17.2.2 Receive Clock Slave Mode .............................................................................................................................................. 70 3.17.2.3 Receive Multiplexed Mode ............................................................................................................................................... 71 3.17.2.4 Offset ................................................................................................................................................................................ 71 3.17.2.5 Output On RSDn/MRSD & RSIGn/MRSIG ....................................................................................................................... 71 3.18 TRANSMIT SYSTEM INTERFACE ............................................................................................................................................................... 73 3.18.1 T1/J1 Mode ...................................................................................................................................................................................... 73 3.18.1.1 Transmit Clock Master Mode ............................................................................................................................................ 73 3.18.1.1.1 Transmit Clock Master Full T1/J1 Mode ........................................................................................................ 73 3.18.1.1.2 Transmit Clock Master Fractional T1/J1 Mode .............................................................................................. 73 3.18.1.2 Transmit Clock Slave Mode ............................................................................................................................................. 74 3.18.1.3 Transmit Multiplexed Mode .............................................................................................................................................. 75 3.18.1.4 Offset ................................................................................................................................................................................ 76 3.18.2 E1 Mode .......................................................................................................................................................................................... 79 3.18.2.1 Transmit Clock Master Mode ............................................................................................................................................ 79 3.18.2.1.1 Transmit Clock Master Full E1 Mode ............................................................................................................ 79 3.18.2.1.2 Transmit Clock Master Fractional E1 Mode .................................................................................................. 79 3.18.2.2 Transmit Clock Slave Mode ............................................................................................................................................. 79 3.18.2.3 Transmit Multiplexed Mode .............................................................................................................................................. 80 |
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