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ICS9LPR501 Datasheet(PDF) 5 Page - Integrated Device Technology |
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ICS9LPR501 Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 21 page IDTTM/ICSTM 64-pin CK505 w/Fully Integrated Voltage Regulator 1118M—11/24/09 Advance Information ICS9LPR501 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR 5 Datasheet Pin Description (Continued) PIN # PIN NAME TYPE DESCRIPTION 49 VDDCPU_IO PWR Supply for CPU outputs. VDDCPU_IO is 1.05 to 3.3V with +/-5% tolerance 50 CPUC1_F OUT Complement clock of low power differenatial CPU clock pair. This clock will be free-running during iAMT. 51 CPUT1_F OUT True clock of low power differential CPU clock pair. This clock will be free-running during iAMT. 52 GNDCPU PWR Ground Pin for CPU Outputs 53 CPUC0 OUT Complement clock of low power differential CPU clock pair. 54 CPUT0 OUT True clock of low power differential CPU clock pair. 55 VDDCPU PWR Power Supply 3.3V nominal. 56 CK_PWRGD/PD# IN Notifies CK505 to sample latched inputs, or iAMT entry/exit, or PWRDWN# mode 57 FSLB/TEST_MODE IN 3.3V tolerant input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values. TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer to Test Clarification Table. 58 GNDREF PWR Ground pin for crystal oscillator circuit 59 X2 OUT Crystal output, nominally 14.318MHz. 60 X1 IN Crystal input, Nominally 14.318MHz. 61 VDDREF PWR Power pin for the REF outputs, 3.3V nominal. 62 REF0/FSLC/TEST_SEL I/O 3.3V 14.318MHz reference clock/3.3V tolerant low threshold input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values/ TEST_SEL: 3-level latched input to enable test mode. Refer to Test Clarification Table. 63 SDATA I/O Data pin for SMBus circuitry, 5V tolerant. 64 SCLK IN Clock pin of SMBus circuitry, 5V tolerant. Fully Integrated Regulator Connection for Desktop/Mobile Applications ICS9LPR501 1.05V to 3.3V (+/-5%) NC PIN 48 VDDCPU_IO, Pin 49 VDDSRC_IO Pin 45,36,26 VDDPLL3_IO, Pin 20 VDD96_IO, Pin 12 SRC_IO Decoupling Network PLL3_IO Decoupling Network CPU_IO Decoupling Network 96_IO Decoupling Network |
Similar Part No. - ICS9LPR501_09 |
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Similar Description - ICS9LPR501_09 |
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