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SN65HVD37DR Datasheet(PDF) 10 Page - Texas Instruments |
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SN65HVD37DR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 16 page SN65HVD37 SLLSE92 A – OCTOBER 2011 – REVISED NOVEMBER 2011 www.ti.com APPLICATION INFORMATION RECEIVER FAILSAFE The differential receiver is “failsafe” to invalid bus states caused by: • open bus conditions such as a disconnected connector, • shorted bus conditions such as cable damage shorting the twisted-pair together, • or idle bus conditions that occur when no driver on the bus is actively driving. In any of these cases, the differential receiver outputs a failsafe logic High state, so that the output of the receiver is not indeterminate. In the HVD37, receiver failsafe is accomplished by offsetting the receiver thresholds so that the “input indeterminate ” range does not include zero volts differential. In order to comply with the RS-422 and RS-485 standards, the receiver output must output a High when the differential input VID is more positive than 200 mV, and must output a Low when the VID is more negative than -200 mV. The receiver parameters which determine the failsafe performance are VIT+ and VIT- and VHYS. In the Electrical Characteristics table, VIT- has a typical value of -120 mV and a minimum (most negative) value of -200 mV, so differential signals more negative than -200 mV will always cause a Low receiver output. Similarly, differential signals more positive than 200 mV will always cause a High receiver output, because the typical value of VIT+ is -60mV, and VIT+ is never more positive than -20 mV under any conditions of temperature, supply voltage, or common-mode offset. When the differential input signal is close to zero, it will still be above the VIT+ threshold, and the receiver output will be High. Only when the differential input is more negative than VIT- will the receiver output transition to a Low state. So, the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis value VHYS (the separation between VIT+ and VIT- ) as well as the value of VIT+. For the HVD37, the typical noise immunity is about 120 mV, which is the negative noise level needed to exceed the VIT- threshold (VIT- TYP = -120 mV). In the worst case, the failsafe noise immunity is never less than 50 mV, which is set by the maximum positive threshold (VIT+ MAX = -20mV) plus the minimum hysteresis voltage (VHYS MIN = 30 mV). HOT-PLUGGING These devices are designed to operate in “hot swap” or “hot pluggable” applications. Key features for hot-pluggable applications are power-up, power-down glitch free operation, default disabled input/output pins, and receiver failsafe. An internal Power-On Reset circuit keeps the driver outputs in a high-impedance state until the supply voltage has reached a level at which the device will reliably operate. This ensures that no spurious transitions (glitches) will occur on the bus pin outputs as the power supply turns on or turns off. As shown in the device FUNCTION TABLE, the ENABLE inputs have the feature of default disable on both the driver enable and receiver enable. This ensures that the device will neither drive the bus nor report data on the R pin until the associated controller actively drives the enable pins. LOW POWER STANDBY MODE As is customary with RS-485 devices, the receiver output is directly enabled/disabled by RE, and the driver outputs are directly enabled/disabled by DE. When both the driver and receiver are disabled, (DE=LO and RE=HI) the receiver differential comparator stage enters a standby mode for reduced power. When either the Driver or Receiver is enabled, the receiver differential comparator stage is enabled for fast response to signal changes. SPACER 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): SN65HVD37 |
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