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HT82A836R Datasheet(PDF) 9 Page - Holtek Semiconductor Inc

Part # HT82A836R
Description  USB Audio MCU
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT82A836R Datasheet(HTML) 9 Page - Holtek Semiconductor Inc

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HT82A836R
Rev. 1.10
9
August 5, 2011
Look-up Table
Any location within the Program Memory can be defined
as a look-up table where programmers can store fixed
data. To use the look-up table, the table pointers must
first be setup which point to the data in the Program
Memory which is to be read. In this device there are two
table pointers, the low byte pointer, TBLP and the high
byte pointer, TBHP. However, the high byte pointer,
TBHP, can only be used if it is enabled using configura-
tion options. Using both table pointers enables any area
in the Program Memory to be addressed while if only the
low byte pointer, TBLP, is used then only the present
page or last page can be addressed.
If the configuration options do not enable the high byte
pointer, then after setting up the low table pointer, TBLP,
the table data can be retrieved from the current Program
Memory page or last Program Memory page using the
²TABRDC[m]² or ²TABRDL [m]² instructions, respec-
tively. When these instructions are executed, the lower
order table byte from the Program Memory will be trans-
ferred to the user defined Data Memory register [m] as
specified in the instruction. The higher order table data
byte from the Program Memory will be transferred to the
TBLH special register.
The following diagram illustrates the addressing/data
flow of the look-up table using the single table address
pointer TBLP:
If the configuration options enable the high table pointer,
TBHP, then this register together with the low table
pointer, TBLP, can be used together as a pair to point to
any located in the Program Memory. After setting up
both the low and high byte table pointers, the table data
can then be retrieved from any area of Program Memory
using the
²TABRDC [m]² instruction or from the last
page of the Program Memory using the
²TABRDL [m]²
instruction. When either of these instructions are exe-
cuted, the lower order table byte from the Program
Memory will be transferred to the user defined Data
Memory register [m] as specified in the instruction. The
higher order table data byte from the Program Memory
will be transferred to the TBLH special register.
The following diagram illustrates the addressing/data
flow of the look-up table using the dual table address
pointers TBLP and TBHP:
Table Program Example
The following example shows how the table pointer and
table data is defined and retrieved from the micro con-
troller using the single table data pointer, TBLP. This ex-
ample uses raw table data located in the last page which
is stored there using the ORG statement. The value at
this ORG statement is
²1F00H² which refers to the start
address of the last page within the 8K Program Memory
of device. The table pointer is setup here to have an ini-
tial value of
²06H². This will ensure that the first data
read from the data table will be at the Program Memory
address
²1F06H² or 6locations after the start of the last
page. Note that the value for the table pointer is refer-
enced to the first address of the present page if the
²TABRDC [m]² instruction is being used. The high byte
of the table data which in this case is equal to zero will
be transferred to the TBLH register automatically when
the
²TABRDL [m]² instruction is executed.
Because the TBLH register is a read-only register and
cannot be restored, care should be taken to ensure its
protection if both the main routine and Interrupt Service
Routine use the table read instructions. If using the table
read instructions, the Interrupt Service Routines may
change the value of TBLH and subsequently cause er-
rors if used again by the main routine. As a rule it is rec-
ommended that simultaneous use of the table read
instructions should be avoided. However, in situations
where simultaneous use cannot be avoided, the inter-
rupts should be disabled prior to the execution of any
main routine table-read instructions. Note that all table
related instructions require two instruction cycles to
complete their operation.
P r o g r a m
M e m o r y
P r o g r a m C o u n t e r
H i g h B y t e
T B L P
T B L H
S p e c i f i e d b y [ m ]
T a b l e C o n t e n t s H i g h B y t e
T a b l e C o n t e n t s L o w B y t e
Single Address Pointer Look-up Table
P r o g r a m
M e m o r y
T B L P
T B L H
S p e c i f i e d b y [ m ]
H i g h b y t e o f t a b l e c o n t e n t s
T B H P
H i g h b y t e o f t a b l e c o n t e n t s
Dual Address Pointer Look-up Table


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