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ICE2QR4765G Datasheet(PDF) 10 Page - Infineon Technologies AG |
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ICE2QR4765G Datasheet(HTML) 10 Page - Infineon Technologies AG |
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10 / 21 page  CoolSET ® - Q1 ICE2QR4765G Functional Description Version 2.0 10 July 26, 2011 0V. As a result, the current flowing out from ZC pin can be calculated as [5] When this current is higher than I ZC_1, the amount of current exceeding this threshold is used to generate an offset to decrease the maximum limit on V CS. Since the ideal curve shown in Figure 6 is a nonlinear one, a digital block in CoolSET ® - Q1 is implemented to get a better control of maximum output power. Additional advantage to use digital circuit is the production tolerance is smaller compared to analog solutions. The typical maximum limit on V CS versus the ZC current is shown in Figure 7. Figure 7 V CS-max versus IZC 3.5 Active Burst Mode Operation At light load condition, the IC enters Active Burst Mode operation to minimize the power consumption. Details about Active Burst Mode operation are explained in the following paragraphs. 3.5.1 Entering Active Burst Mode Operation For determination of entering Active Burst Mode operation, three conditions apply: • the feedback voltage is lower than the threshold of V FBEB(1.25V). Accordingly, the peak current sense voltage across the shunt resistor is 0.17V; • the up/down counter is 7; and • a certain blanking time (t BEB). Once all of these conditions are fulfilled, the Active Burst Mode flip-flop is set and the controller enters Active Burst Mode operation. This multi-condition determination for entering Active Burst Mode operation prevents mistriggering of entering Active Burst Mode operation, so that the controller enters Active Burst Mode operation only when the output power is really low during the preset blanking time. 3.5.2 During Active Burst Mode Operation After entering the Active Burst Mode the feedback voltage rises as V OUT starts to decrease due to the inactive PWM section. One comparator observes the feedback signal if the voltage level V BH (3.6V) is exceeded. In that case the internal circuit is again activated by the internal bias to start with switching. Turn-on of the power MOSFET is triggered by the timer. The PWM generator for Active Burst Mode operation composes of a timer with a fixed frequency of 52kHz, typically, and an analog comparator. Turn-off is resulted by comparison of the voltage signal v 1 with an internal threshold, by which the voltage across the shunt resistor V csB is 0.34V, accordingly. A turn-off can also be triggered by the maximal duty ratio controller which sets the maximal duty ratio to 50%. In operation, the output flip-flop will be reset by one of these signals which comes first. If the output load is still low, the feedback signal decreases as the PWM section is operating. When feedback signal reaches the low threshold V BL(3.0V), the internal bias is reset again and the PWM section is disabled until the next regulation signal increases beyond the V BH threshold. In Active Burst Mode, the feedback signal is changing like a saw tooth between 3.0V and 3.6V shown in Figure 8. 3.5.3 Leaving Active Burst Mode Operation The feedback voltage immediately increases if there is a high load jump. This is observed by one comparator. As the current limit is 34% during Active Burst Mode a certain load is needed so that feedback voltage can exceed V LB (4.5V). After leaving active burst mode, maximum current can now be provided to stabilize V O. In addition, the up/down counter will be set to 1 iimmediately after leaving Active Burst I ZC V BUS N a R ZC1 N P ------------------------ = 0.6 0.7 0.8 0.9 1 300 500 700 900 1100 1300 1500 1700 1900 2100 Iz c(uA) |
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