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MCM6208CP12 Datasheet(PDF) 2 Page - Motorola, Inc |
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MCM6208CP12 Datasheet(HTML) 2 Page - Motorola, Inc |
2 / 8 page MCM6208C 2 MOTOROLA FAST SRAM TRUTH TABLE (X = Don’t Care) E W Mode VCC Current Output Cycle H L L X H L Not Selected Read Write ISB1, ISB2 ICCA ICCA High–Z Dout High–Z — Read Cycle Write Cycle ABSOLUTE MAXIMUM RATINGS (See Note) Rating Symbol Value Unit Power Supply Voltage VCC – 0.5 to + 7.0 V Voltage Relative to VSS For Any Pin Except VCC Vin, Vout – 0.5 to VCC + 0.5 V Output Current Iout ± 20 mA Power Dissipation PD 1.0 W Temperature Under Bias Tbias – 10 to + 85 °C Operating Temperature TA 0 to + 70 °C Storage Temperature — Plastic Tstg – 55 to + 125 °C NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPER- ATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. DC OPERATING CONDITIONS AND CHARACTERISTICS (VCC = 5.0 V ± 10%, TA = 0 to 70°C, Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Typ Max Unit Supply Voltage (Operating Voltage Range) VCC 4.5 5.0 5.5 V Input High Voltage VIH 2.2 — VCC + 0.3** V Input Low Voltage VIL – 0.5 * — 0.8 V * VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width ≤ 20 ns) ** VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width ≤ 20 ns) DC CHARACTERISTICS Parameter Symbol Min Max Unit Input Leakage Current (All Inputs, Vin = 0 to VCC) Ilkg(I) — ± 1 µA Output Leakage Current (E1 = VIH, Vout = 0 to VCC) Ilkg(O) — ± 1 µA Standby Current (E ≥ VCC – 0.2 V*, Vin ≤ VSS + 0.2 V, or ≥ VCC – 0.2 V, VCC = Max, f = 0 MHz) ISB2 — 20 mA Output Low Voltage (IOL = 8.0 mA) VOL — 0.4 V Output High Voltage (IOH = – 4.0 mA) VOH 2.4 — V POWER SUPPLY CURRENTS Parameter Symbol – 12 – 15 – 20 – 25 – 35 Unit AC Supply Current (Iout = 0 mA, VCC = Max, f = fmax) ICCA 165 155 145 135 135 mA Standby Current (E = VIH, VCC = Max, f = fmax) ISB1 55 50 45 40 40 mA This device contains circuitry to protect the inputs against damage due to high static volt- ages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maxi- mum rated voltages to this high–impedance circuit. This CMOS memory circuit has been designed to meet the dc and ac specifications shown in the tables, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow of at least 500 linear feet per minute is maintained. |
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