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SY89853UMGTR Datasheet(PDF) 6 Page - Micrel Semiconductor |
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SY89853UMGTR Datasheet(HTML) 6 Page - Micrel Semiconductor |
6 / 13 page Micrel, Inc. SY89853U August 2007 6 M9999-082907-C hbwhelp@micrel.com or (408) 955-1690 AC Electrical Characteristics (6) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to + 85°C, RL = 50 Ω to V CC–2V, unless otherwise stated. Symbol Parameter Condition Min Typ Max Units fMAX Maximum Operating Frequency NRZ Data 2.5 Gbps Clock, VOUT > 400mV 2.5 GHz tpd Propagation Delay IN-to-Q SEL-to-Q 160 250 360 ps 100 260 400 ps tpd Tempco Differential Propagation Delay Temperature Coefficient 143 fs/ ºC tSKEW Input-to-Input Skew (Within-bank) Bank-to-Bank Skew Note 7 10 20 ps Note 8 12 25 ps tJITTER Data Random Jitter (RJ) Note 9 1 psRMS Deterministic Jitter (DJ) Note 10 10 psPP Clock Cycle-to-Cycle Jitter Note 11 1 psRMS Total Jitter (TJ) Note 12 10 psPP Crosstalk-Induced Jitter Channel-to-Channel (Within-bank) Note 13, within-bank 0.7 psRMS tr, tf Output Rise/Fall Time (20% to 80%) At full output swing. 50 100 180 ps Notes: 6. High-speed AC parameters are guaranteed by design and characterization. VIN swing ≥ 100mV, unless otherwise stated. 7. Input-to-input skew is the difference in time between two inputs to the output within a bank. 8. Bank-to-bank skew is the difference in time from input to the output between banks. 9. Random jitter is measured with a K28.7 character pattern, measured at <fMAX. 10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2 23-1 PRBS pattern. 11. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the output signal. 12. Total jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10 12 output edges will deviate by more than the specified peak-to-peak jitter value. 13. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each other at the inputs. |
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