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SY88973BLMGTR Datasheet(PDF) 3 Page - Micrel Semiconductor

Part # SY88973BLMGTR
Description  3.3V 3.2Gbps CML Low Power Limiting Post
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY88973BLMGTR Datasheet(HTML) 3 Page - Micrel Semiconductor

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Micrel, Inc.
SY88973BL
February 2007
3
M9999-020207-A
hbwhelp@micrel.com or (408) 955-1690
Pin Configuration
16-pin QFN
Pin Description
Pin Number
(QFN)
Pin Name
Type
Pin Function
15
/EN
TTL Input: Default
is high.
Enable: De-asserts true data output when high. Incorporates 25k
Ω pull-up to
VCC.
1, 4
DIN, /DIN
Differential Data
Input
Differential data input. Each pin internally terminates to REF through 50
Ω.
6
REF
Reference Voltage: Bypass with 0.01µF low ESR capacitor from REF to VCC
to stabilize LOSLVL and REF.
14
LOSLVL
Input: Default is
maximum
sensitivity
Loss-of-Signal Level Set: A resistor from this pin to VCC sets the threshold for
the data input amplitude at which the LOS output will be asserted.
2, 3, 10, 11
Exposed Pad
GND
Ground
Device ground. Exposed pad must be soldered (or equivalent) to the same
potential as the ground pins.
7
LOS
Open Collector TTL
Output
Loss-of-Signal: asserts high when the data input amplitude falls below the
threshold set by LOSLVL. For proper operation, connect an external 4.75k
to 10k
Ω pull-up resistor between this pin and Vcc.
9, 12
DOUT,
/DOUT
Differential CML
Output
Differential data output.
5, 8, 13, 16
VCC
Power Supply
Positive power supply. Bypass with 0.1µF|| 0.01µF low ESR capacitors.
0.01µF capacitors should be as close as possible to VCC pins.


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