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SY58026U Datasheet(PDF) 2 Page - Micrel Semiconductor |
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SY58026U Datasheet(HTML) 2 Page - Micrel Semiconductor |
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2 / 11 page  2 Precision Edge® SY58026U M9999-082707 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. PACKAGE/ORDERING INFORMATION Pin Number Pin Name Pin Function 25, 28, INA0, /INA0, Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs 29, 32, INA1, /INA1, accept AC- or DC-coupled differential signals as small as 100mV. Each pin of a pair internally 1, 4, INB0, /INB0, terminates to a VT pin through 50ý. Note that these inputs will default to an indeterminate 5, 8 INB1, /INB1 state if left open. Unused differential input pairs can be terminated by connecting one input to VCC and the complementary input to GND through a 1ký resistor. The VT pin is to be left open in this configuration. Please refer to the “Input Interface Applications” section for more details. 26, 30, 2, 6 VTA0 , VTA1, Input Termination Center-Tap: Each side of the differential input pair, terminates to a VT VTB0, VTB1 pin. Each VT pin provides a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more details. 18, 15 SELA, SELB Bank A, Bank B Input Channel Select (TTL/CMOS): These TTL/CMOS-compatible inputs select the inputs to the multiplexers. These inputs are internally connected to a 25ký pull-up resistor and will default to a logic HIGH state if left open. Input switching threshold is VCC/2. 27, 31, 3, 7 VREF-ACA0, Reference Output Voltage: These outputs bias to VCC –1.2V. Connect to VT pin when VREF-ACA1, AC-coupling the data inputs. Bypass with 0.01µF low ESR capacitor to VCC. VREF-ACB0, Maximum current source or sink is 0.5mA. See “Input Interface Applications” section. VREF-ACB1 10, 13, 16, VCC Positive Power Supply: Bypass with 0.1µF ™ℑ0.01µF low ESR capacitors. 17, 20, 23 22, 21, QA, /QA, Differential 100k LVPECL Outputs: MUX A and MUX B selected LVPECL outputs. 12, 11 QB, /QB See “Output Interface Applications” section for termination. Refer to the “Truth Table” for logic operation. 9, 24 GND, Ground: Ground pins and exposed pad must be connected to the same ground plane. Exposed pad 14, 19 NC Not connected. PIN DESCRIPTION 24 23 22 21 20 19 18 17 GND VCC QA /QA VCC NC SELA VCC INB0 VTB0 VREF-ACB0 /INB0 INB1 VTB1 VREF-ACB1 /INB1 1 2 3 4 5 6 7 8 910 11 12 13 14 15 16 32 31 30 29 28 27 26 25 32-Pin MLF® (MLF-32) Ordering Information(1) Package Operating Package Lead Part Number Type Range Marking Finish SY58026UMI MLF-32 Industrial SY58026U Sn-Pb SY58026UMITR(2) MLF-32 Industrial SY58026U Sn-Pb SY58026UMG MLF-32 Industrial SY58026U with Pb-Free Pb-Free bar-line indicator NiPdAu SY58026UMGTR(2) MLF-32 Industrial SY58026U with Pb-Free Pb-Free bar-line indicator NiPdAu Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only. 2. Tape and Reel. |
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