SY100EP111U_11 datasheet(2/9 Pages) MICREL

Part #	SY100EP111U

Description	2.5V/3.3V 1:10 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK DRIVER

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Manufacturer	MICREL [Micrel Semiconductor]

Direct Link	http://www.micrel.com

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Precision Edge®

SY100EP111U

Micrel, Inc.

M9999-021511

hbwhelp@micrel.com or (408) 955-1690

PACKAGE/ORDERING INFORMATION

Ordering Information(1)

Package

Operating

Package

Lead

Part Number

Type

Range

Marking

Finish

SY100EP111UTI

T32-1

Industrial

100EP111UTI

Sn-Pb

SY100EP111UTITR(2)

T32-1

Industrial

100EP111UTI

Sn-Pb

SY100EP111UTG(3)

T32-1

Industrial

100EP111UTG with

Pb-Free

Pb-Free bar-line indicator

NiPdAu

SY100EP111UTGTR(2, 3)

T32-1

Industrial

100EP111UTG with

Pb-Free

Pb-Free bar-line indicator

NiPdAu

SY100EP111UTGTX(2, 4)

T32-1

Industrial

100EP111UTG with

Pb-Free

Pb-Free bar-line indicator

NiPdAu

Notes:

1. Contact factory for die availability. Dice are guaranteed at T

A = 25°C, DC Electricals only.

2. Tape and Reel.

3. Pb-Free package is recommended for new designs.

4. EIA specification orientation.

32 31 30 29 28 27 26 25

910 11 1213 1415 16

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

VCC

CLK_SEL

CLK0

/CLK0

VBB

CLK1

/CLK1

VEE

Q3

/Q3

Q4

/Q4

Q5

/Q5

Q6

/Q6

Top View

TQFP

T32-1

32-Pin TQFP (T32-1)

Function

CLK0, /CLK0

LVPECL, LVECL, HSTL Clock Inputs:

CLK0 input includes a 75kΩ pull-down. Default

is low if left floating. /CLK0 includes an internal

75kΩ pull-up and pull-down. Default state is

V

CC/2.

CLK1, /CLK1

LVPECL, LVECL, HSTL Clock Inputs:

CLK input includes a 75kΩ pull-down. Default

is low if left floating. /CLK includes an internal

75kΩ pull-up and pull-down. Default state is

VCC/2.

Q0 to Q9

LVPECL/LVECL Outputs.

/Q0 to /Q9

Complementary LVPECL/LVECL Outputs.

CLK_SEL

LVPECL/LVECL Clock Select Input: Internal

75kΩ resistor connected to VEE. When left

floating, the default condition is LOW.

V

BB

Reference Voltage: AC coupled or single-

ended input applications.

V

CC

Positive Power Supply: Bypass with 0.1µF//

0.01µF low ESR capacitors.

V

EE

Negative Power Supply: LVPECL operation,

connect to GND.

PIN NAMES

CLK_SEL

Active Input

0

CLK0, /CLK0

1

CLK1, /CLK1

FUNCTION TABLE

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