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KSZ8842-16MBL-EVAl Datasheet(PDF) 1 Page - Micrel Semiconductor

Part # KSZ8842-16MBL-EVAl
Description  2-Port Ethernet Switch with Non-PCI Interface
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

KSZ8842-16MBL-EVAl Datasheet(HTML) 1 Page - Micrel Semiconductor

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KSZ8842-16/32
MQL/MVL/MVLI/MBL
2-Port Ethernet Switch with Non-PCI Interface
Data Sheet Rev 1.9
LinkMD is a registered trademark of Micrel, Inc.
Product names used in this datasheet are for identification purposes only and may be trademarks of their respective companies
October 2007
1
M9999-102207-1.9
General Description
The KSZ8842-series of 2-port switches includes PCI and
non-PCI CPU interfaces, and are available in 8/16-bit
and 32-bit bus designs (see Ordering Information).
This datasheet describes the KSZ8842M-series of non-
PCI CPU interface chips. For information on the
KSZ8842 PCI CPU interface switches, refer to the
KSZ8842P datasheet.
The KSZ8842M is the industry’s first fully managed, 2-
port switch with a non-PCI CPU interface. It is based on
a proven, 4
th
generation, integrated Layer-2 switch,
compliant with IEEE 802.3u standards. Also an industrial
temperature
grade
version
of
the
KSZ8842,
the
KSZ8842MVLI,
can
be
ordered
(see
Ordering
Information).
The KSZ8842M can be configured as a switch or as a
low-latency (
≤ 310 nanoseconds) repeater in latency-
critical, embedded or industrial Ethernet applications.
For industrial applications, the KSZ8842M can run in
half-duplex mode regardless of the application.
LinkMD
®
The KSZ8842M offers an extensive feature set that
includes tag/port-based VLAN, quality of service (QoS)
priority management, management information base
(MIB) counters, and CPU control/data interfaces to
effectively address Fast Ethernet applications.
The KSZ8842M contains: Two 10/100 transceivers with
patented,
mixed-signal,
low-power
technology,
two
media access control (MAC) units, a direct memory
access (DMA) channel, a high-speed, non-blocking,
switch fabric, a dedicated 1K entry forwarding table, and
an on-chip frame buffer memory.
Functional Diagram
P1 H P A u to
MD I/ MD I - X
P2 H P A u to
MD I/ MD I - X
E m b e d d e d
P r o c e s s o r In te r fa c e
1K lo ok - u p
En g in e
S c he du lin g
M a nag em en t
B u ffe r
M a n age m e nt
Fr a m e
B u ffe r s
10 /1 00
MA C 1
10 /1 00
MA C 2
Sw itc h
Ho s t
MA C
1 0 /1 00 B a s e -
T/T X
PH Y 1
1 0 /1 00 B a s e -
T/T X
PH Y 2
EEPR O M
In te r fa c e
LE D
Dr iv e r s
MIB
Co u n te r s
P 1 LE D [3: 0]
P 2 LE D [3: 0]
EEP R O M I/F
N on- P C I
CP U
Bu s
In te r fa c e
Un i t
QM U
DM A
C h an ne l
Co n tr o l
R e gis ter s
RX Q
4K B
8 ,16 , or 32 - b it
G e n e r i c H o st
In te r fa c e
TX Q
4K B
Figure 1. KSZ8842M Functional Diagram


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