Semiconductor Group

1

3.96

•

4 194 304 words by 4-bit organization

•

0 to 70 °C operating temperature

•

Performance

•

Single + 3.3 V (± 0.3V ) supply

•

Low power dissipation

max. 396 active mW (HYB3117405BJ/BT-50)

max. 363 active mW (HYB3117405BJ/BT-60)

max. 330 active mW (HYB3117405BJ/BT-70)

max. 360 active mW (HYB3116405BJ/BT-50)

max. 324 active mW (HYB3116405BJ/BT-60)

max. 288 active mW (HYB3116405BJ/BT-70)

7.2 mW standby (LV-TTL)

3.6 mW standby (LV-CMOS)

720

µW standby for L-version

•

Output unlatched at cycle end allows two-dimensional chip selection

•

Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh,

Self Refresh and test mode

•

Hyper page mode (EDO) capability

•

All inputs, outputs and clocks fully TTL-compatible

•

2048 refresh cycles / 32 ms for HYB3117405

4096 refresh cycles / 64 ms for HYB3116405

•

Plastic Package:

P-SOJ-26/24-1

(300 mil)

P-TSOPII-26/24-1 (300mil)

-50

-60

-70

tRAC

RAS access time

50

60

70

ns

tCAC

CAS access time

13

15

20

ns

tAA

Access time from address

25

30

35

ns

tRC

Read/Write cycle time

84

104

124

ns

tHPC

Hyper page mode (EDO)

cycle time

20

25

30

ns

3.3V 4M x 4-Bit EDO-Dynamic RAM

Advanced Information

HYB3116405BJ/BT(L) -50/-60/-70

HYB3117405BJ/BT(L) -50/-60/-70