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HYB3164805T-60 Datasheet(PDF) 9 Page - Siemens Semiconductor Group |
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HYB3164805T-60 Datasheet(HTML) 9 Page - Siemens Semiconductor Group |
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9 / 32 page  Semiconductor Group 157 HYB3164(5)805J/T(L)-50/-60 8M x 8 EDO-DRAM AC Characteristics 5)6) T A = 0 to 70 ˚C,VCC = 3.3 V ± 0.3V , tT = 2 ns Parameter Symbol Limit Values Unit Note -50 -60 min. max. min. max. common parameters Random read or write cycle time tRC 84 – 104 – ns RAS precharge time tRP 30 – 40 – ns RAS pulse width tRAS 50 100k 60 100k ns CAS pulse width tCAS 8 10k 10 10k ns Row address setup time tASR 0–0– ns Row address hold time tRAH 8–10 – ns Column address setup time tASC 0–0– ns Column address hold time tCAH 8–10 – ns RAS to CAS delay time tRCD 12 37 14 45 ns RAS to column address delay time tRAD 10 25 12 30 ns RAS hold time tRSH 810 – ns CAS hold time tCSH 45 50 – ns CAS to RAS precharge time tCRP 5–5– ns Transition time (rise and fall) tT 1 50 1 50 ns 7 Refresh period for HYB3164805 tREF – 128 – 128 ms Refresh period for HYB3165805 tREF – 64 – 64 ms Read Cycle Access time from RAS tRAC – 50 – 60 ns 8, 9 Access time from CAS tCAC – 13 – 15 ns 8, 9 Access time from column address tAA – 25 – 30 ns 8,10 OE access time tOEA – 13 – 15 ns Column address to RAS lead time tRAL 25 – 30 – ns Read command setup time tRCS 0–0– ns Read command hold time tRCH 0–0– ns 11 Read command hold time referenced to RAS tRRH 0–0– ns 11 |
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