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HYB39S64800 Datasheet(PDF) 9 Page - Siemens Semiconductor Group |
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HYB39S64800 Datasheet(HTML) 9 Page - Siemens Semiconductor Group |
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9 / 53 page  Semiconductor Group 9 HYB39S64400/800/160AT(L) 64MBit Synchronous DRAM Address Input for Mode Set (Mode Register Operation) A11 A3 A4 A2 A1 A0 A10 A9 A8 A7 A6 A5 Address Bus (Ax) BT Burst Length CAS Latency Mode Register (Mx) CAS Latency M6 M5 M4 Latency 00 0Reserved 00 1Reserved 01 0 2 01 1 3 10 0 Reserved 10 1 11 0 11 1 Burst Length M2 M1 M0 Length Sequential Interleave 000 1 1 001 2 2 010 4 4 011 8 8 100 Reserved Reserved 101 110 1 1 1 Full Page *) Burst Type M3 Type 0 Sequential 1 Interleave Operation Mode BA1 BA0 M11 M10 M9 M8 M7 Mode 0000 0 0 0 burst read / burst write 0000 1 0 0 burst read / single write Operation Mode BA0 BA1 *) optional |
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