12-Bit 300ksps ADCs with FIFO,

Temp Sensor, Internal Reference

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5

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Externally clocked conversion

208

SCLK Clock Period

Data I/O

100

ns

SCLK Duty Cycle

40

60

%

SCLK Fall to DOUT Transition

40

ns

CS Rise to DOUT Disable

40

ns

CS Fall to DOUT Enable

40

ns

DIN to SCLK Rise Setup

40

ns

SCLK Rise to DIN Hold

0ns

C

40

ns

C

S Fall-to-SCLK Hold Time

0ns

CKSEL = 00, CKSEL = 01 (temp sense)

40

ns

CNVST Pulse Width

CKSEL = 01 (voltage conversion)

1.4

µs

Temp sense

55

Voltage conversion

7

CS or CNVST Rise to EOC

Low (Note 10)

Reference power-up

65

µs

TIMING CHARACTERISTICS (Figure 1)

-1.0

-0.4

-0.6

-0.8

-0.2

0

0.2

0.4

0.6

0.8

1.0

0

1024

2048

3072

4096

INTEGRAL NONLINEARITY

vs. OUTPUT CODE

OUTPUT CODE

-1.0

-0.4

-0.6

-0.8

-0.2

0

0.2

0.4

0.6

0.8

1.0

0

1024

2048

3072

4096

DIFFERENTIAL NONLINEARITY

vs. OUTPUT CODE

OUTPUT CODE

SINAD vs. FREQUENCY

FREQUENCY (kHz)

100

10

1

10

20

40

30

60

50

90

80

70

100

0

0.1

1000

Typical Operating Characteristics

Note 10: This time is defined as the number of clock cycles needed for conversion multiplied by the clock period. If the internal ref

erence needs to be powered up, the total time is additive. The internal reference is always used for temperature measure

ments.