Level-Translating GPIO and LED Driver

with High Level of Integrated ESD Protection

MAX7304

 Maxim Integrated Products 4

Note 4: Guaranteed by design.

Note 6: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge

the undefined region of SCL’s falling edge.

Note 8: Input filters on the SDA, SCL, and AD0 inputs suppress noise spikes less than 50ns.

Typical Operating Characteristics

ELECTRICAL CHARACTERISTICS (continued)

GPO OUTPUT LOW VOLTAGE

vs. SINK CURRENT (PORT15–PORT12)

SINK CURRENT (mA)

18

16

14

12

10

8

6

4

2

20

40

60

80

100

120

0

020

GPO OUTPUT LOW VOLTAGE

vs. SINK CURRENT (PORT15–PORT12)

SINK CURRENT (mA)

18

16

14

12

10

8

6

4

2

20

40

60

80

100

120

0

020

GPO OUTPUT LOW VOLTAGE

vs. SINK CURRENT (PORT15–PORT12)

SINK CURRENT (mA)

18

16

14

12

10

8

6

4

2

20

40

60

80

100

120

0

020

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Pulse Width of Spike Suppressed

(Notes 4, 8)

50

ns

Capacitive Load for Each Bus Line

(Note 4)

400

pF

Bus Timeout

14

19

27

ms

ESD PROTECTION

PORT_

IEC 61000-4-2 Air-Gap Discharge

Q

15

kV

IEC 61000-4-2 Contact Discharge

Q

8

All Other Pins

Human Body Model

Q

2.5

kV