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AZP63 Datasheet(PDF) 1 Page - Arizona Microtek, Inc |
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AZP63 Datasheet(HTML) 1 Page - Arizona Microtek, Inc |
1 / 12 page www.azmicrotek.com 1630 S Stapley Dr, Suite 127 +1-480-962-5881 Mesa, AZ 85204 USA Request a Sample May 2012, Rev 2.1 DESCRIPTION The AZP63 is a sine wave/CMOS to LVPECL buffer/divider optimized for very low phase noise (-165dBc/Hz). It is particularly useful in converting crystal or SAW based oscillators into LVPECL outputs for greater than 1GHz of bandwidth. For lower power consumption and reduced bandwidth, refer to the AZP5x family. The AZP63 is one of a family of parts that provide options of fixed ÷1, fixed ÷2 and selectable ÷1, ÷2 modes as well as active high enable or active low enable to oscillator designers. Refer to Table 2 for the comparison of parts within the AZP5x and AZP63 family. BLOCK DIAGRAM FEATURES • LVPECL outputs optimized for very low phase noise (-165dBc/Hz) • High bandwidth, > 1GHz • Selectable ÷1, ÷2 output • Selectable Enable logic • 3.0V to 3.6V operation APPLICATIONS • Converting crystal or SAW based oscillators to LVPECL output PACKAGE AVAILABILITY • Available in die • SON8 • Green/RoHS Compliant/Pb-Free AZP63 Low Phase Noise Sine Wave/CMOS to LVPECL Buffer/Divider Order Number Package Marking AZP63QG 1 SON8 E <Date Code> 2 1 Tape & Reel - Add 'R1' at end of order number for 7in (1k parts), 'R2' (2.5k) for 13in 2 See www.azmicrotek.com for date code format www.azmicrotek.com |
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