Semiconductor Group

9

HYM 364025S/GS-50/-60

4M

× 36-Bit EDO-Module

Notes:

1) All voltages are referenced to

V

Vil may undershoot to -2.0 V for pulse width of less than or equal to 4 ns. Pulse width is measured at 50%

points with amplitude measured peak to the DC reference.

2)

I

3)

I

4) Address can be changed once or less while RAS = Vil. In case of ICC4 it can be changed once or less during

a hyper page mode (EDO) cycle.

5) An initial pause of 200

µs is required after power-up followed by 8 RAS cycles of which at least one cycle has

to be a refresh cycle, before proper device operation is achieved. In case of using the internal refresh counter,

a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required.

6) AC measurements assume

t

7)

V

IH

measured between

V

8) Measured with the specified current load and 100 pF at Vol = 0.8 V and Voh = 2.0 V. Access time is determined

.

9) Operation within the t

only. If t

10) Operation within the t

RAD (max.

only. If t

11) Either t

12) t

output voltage levels. t

13) t

If t

through the entire cycle.

14) These parameters are referenced to the CAS leading edge.