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AKD4201 Datasheet(PDF) 10 Page - Asahi Kasei Microsystems |
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AKD4201 Datasheet(HTML) 10 Page - Asahi Kasei Microsystems |
10 / 14 page [AK4201] MS1077-E-01 2011/02 - 10 - ■ Power-Up/Down Sequence The PDN pin must keep “L” until all power supply pins (AVDD, PVDD) are supplied, and must be set to “H” after. Power Supply PDN pin PVEE pin LOUT/ROUT pins (1) 0V PVEE pin Output =-3.3V(Typ.) 0V 0V (2) (3) Normal Operation(0V Common) 0V Don’t Care Normal Operation The Device in front of AK4201 DAC etc Don’t Care (5) The Device in front of AK4201 Click noise 0V Power Up (No Signal Output) (4) A Ta Figure 4. Power-up/down Sequence example (1) The interval from power Up to PDN pin = “L” → “H” “L” time of 150ns or more is needed to reset the AK4201. The power should be ON when the PDN pin = “L”. The PDN pin should be set to “H” after power supply (AVDD, PVDD) are ON. (2) The interval from power-up of the signal source device in front of the AK4201 to the AK4201’s PDN pin transition from “L” to “H” The other device should be powered up with no signal (e.g. MUTE). When a step wave (an instant DC level change) is output from the other device at the power-up, a high pass filter response wave will occur at “A” timing of Figure 4, according to the time constant of the input coupling capacitor (Ci) and the input resistor(Ri) in front of the AK4201. In order to prevent this pop noise through the AK4201, a wait time “Ta” is required after the other devices are powered-up. The AK4201 can attenuate pop noises of the other device by a built-in mute circuit during shutdown mode (PDN pin= “L”). Ta calculation example: (in the case of Ci =0.22uF, Ri = 20kΩ) τ=0.22u * 20k = 4.4ms Ta =τ* 7.6 = 33ms (When noise level by former device= 2V, response wave level= 1mV. 7.6*τ is needed) If a waiting time is not sufficient, a pop noise might occur, but there is no problem for the normal operation. (3) The AK4201 is in normal operation 50ms (max) after the PDN pin goes to “H”. The other device in front of the AK4201 should be still muted during this interval (50ms). (4) The other device in front of the AK4201 should start outputting the signal after the AK4201 starts Normal Operation. If click noise is generated by former device when MUTE is canceled, it will be output from the AK4201. (5) The PDN pin = “L”. LOUT/ROUT pins short to VSS1 with 20Ω(typ.). After 50ms (max.), the PVEE pin will be 0V according to a capacitor which connected to PVEE and internal resistance (typ. 17.5kΩ). The AK4201 can be powered up again after 150ns or more from the PDN pin = “L”. |
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