Semiconductor Group

2

HYM72V4000/10GS-50/-60

4M x 72-ECC Module

The HYM 72V4000/10GS-50/-60 is a 32 MByte DRAM module organized as 4 194 430 words by 72-

bit in a 168-pin, dual read-out, single-in-line package comprising eighteen HYB 3116400BT/BJ

4M

× 4 DRAMs in 300 mil wide TSOPII or SOJ- packages mounted together with ceramic

decoupling capacitors on a PC board. All inputs except

RAS and DQ are buffered by using

BiCMOS buffers/line drivers.

Each HYB 3116400BT/BJ

is described in the data sheet and is fully electrically tested and

processed according to Siemens standard quality procedure prior to module assembly. After

assembly onto the board, a further set of electrical tests is performed.

The density and speed of the module can be detected by the use of presence detect pins.

Ordering Information

Pin Names

Presence-Detect and ID-pin Truth Table:

Note: 1 = High Level ( Driver Output) , 0 = Low Level (Driver Output) for PDE active ( ground) . For PDE at a high

level all PD terminal are in tri-state.

Type

Ordering Code

Package

Descriptions

HYM 72V4000GS-50

L-DIM-168-5

3.3V 50ns DRAM module

HYM 72V4000GS-60

Q67100-Q2077

L-DIM-168-5

3.3V 60ns DRAM module

HYM 72V4010GS-50

L-DIM-168-5

3.3V 50ns DRAM module

HYM 72V4010GS-60

Q67100-Q2078

L-DIM-168-5

3.3V 60ns DRAM module

A0-A11,B0

Address Input

DQ0 - DQ71

Data Input/Output

RAS0, RAS2

Row Address Strobe

CAS0 , CAS2

Column Address Strobe

WE0, WE2

Read / Write Input

OE0, OE2

Output Enable

Vcc

Power (+3.3 Volt)

Vss

Ground

PD1 - PD8

Presence Detect Pins

PDE

Presence Detect Enable

ID0 , ID1

ID indentification bit

N.C.

No Connection

Module

ID0

ID1

PD1

PD2

PD3

PD4

PD5

PD6

PD7

PD8

HYM 72V4000GS-50

Vss

Vss

1

1

0

1

0

0

0

0

HYM 72V4000GS-60

Vss

Vss

1

1

0

1

0

1

1

0