HYM72V4015GS-50 datasheet(6/11 Pages) SIEMENS

Part #	HYM72V4015GS-50

Description	4M x 72-Bit EDO-DRAM Module

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Manufacturer	SIEMENS [Siemens Semiconductor Group]

Direct Link	http://www.siemens.com/

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6 / 11 page

Semiconductor Group

6

HYM72V4005/15GS-50/-60

4M x 72-ECC EDO-Module

Capacitance

T

A = 0 to 70 °C; VCC = 3.3 V ± 0.3V; f = 1 MHz

Average

V

CC supply current during RAS

only refresh cycles:

-50 version

-60 version

(RAS cycling, CAS =

V

IH ,

t

RC = tRC min.)

I

CC3

–

1800

1620

mA

2)4)

Average

V

CC supply current during hyper

page mode (EDO):

-50 version

-60 version

(RAS =

V

IL, CAS, address cycling

t

PC = tPC min.)

I

CC4

–

1260

990

mA

2)3)4)

Standby

V

CC supply current

(RAS = CAS =

V

CC – 0.2 V,

one address change within 15,6

µs trc)

I

CC5

–30

mA

–

Average

V

CC supply current during

CAS-before-RAS refresh mode:

-50 version

-60 version

(RAS, CAS cycling

, t

RC = tRC min.)

I

CC6

–

1800

1620

mA

2)4)

Parameter

Symbol

Limit Values

Unit

min.

max.

Input capacitance (A0 to A11,B0)

C

I1

–10

pF

Input capacitance (RAS0, RAS2)

C

I2

–50

pF

Input capacitance (CAS0, CAS4)

C

I3

–15

pF

Input capacitance (WE0,WE2,OE0,OE2)

C

I4

–15

pF

I/O capacitance (DQ0-DQ71)

C

IO1

–15

pF

Parameter

Symbol

Limit Values

Unit

Test

Condition

min.

max.

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HYM72V4015GS-50 Datasheet(PDF) 6 Page - Siemens Semiconductor Group

HYM72V4015GS-50 Datasheet(HTML) 6 Page - Siemens Semiconductor Group

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