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HYM72V8030GS-60 Datasheet(PDF) 7 Page - Siemens Semiconductor Group |
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HYM72V8030GS-60 Datasheet(HTML) 7 Page - Siemens Semiconductor Group |
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7 / 12 page  Semiconductor Group 7 HYM72V8020/30GS-50/-60 8M x 72-ECC Module AC Characteristics (note:5, 6,7,8) T A = 0 to 70 °C,VCC = 3.3 ± 0.3 V Parameter Symbol -50 -60 Unit Note min. max. min. max. common parameters Random read or write cycle time t RC 90 – 110 – ns RAS precharge time t RP 30 – 40 – ns RAS pulse width t RAS 50 100k 60 100k ns CAS pulse width t CAS 13 100k 15 100k ns Row address setup time t ASR 5–5–ns 9 Row address hold time tRAH 8–8–ns 10 Column address setup time tASC 2–2–ns 11 Column address hold time tCAH 15 – 15 – ns 9 RAS to CAS delay time tRCD 16 32 18 40 12 RAS to column address delay time tRAD 11 20 13 25 ns 12 RAS hold time tRSH 18 – 20 – ns 9 CAS hold time tCSH 48 – 58 – ns 10 CAS to RAS precharge time t CRP 10 – 10 – ns 9 Transition time (rise and fall) tT 330 3 30 ns 7 Refresh period tREF –64 – 64 ms Read Cycle Access time from RAS t RAC –50 – 60 ns 13,14 Access time from CAS t CAC –18 – 20 ns 9,13,14 Access time from column address t AA –30 – 35 ns 9,13, 15 OE access time t OEA –18 – 20 ns 9,13 Column address to RAS lead time t RAL 30 – 35 – ns 9 Read command setup time t RCS 2–2–ns 11 Read command hold time tRCH 2–2–ns 11,16 Read command hold time referenced to RAS tRRH 0–0–ns 16 CAS to output in low-Z t CLZ 2–2–ns 11,13 Output buffer turn-off delay t OFF –18 – 20 ns 9,17 Output buffer turn-off delay from OE tOEZ –18 – 20 ns 9,17 |
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