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AK5373 Datasheet(PDF) 10 Page - Asahi Kasei Microsystems |
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AK5373 Datasheet(HTML) 10 Page - Asahi Kasei Microsystems |
10 / 53 page [ AK5373] MS1202-E-00 2010/0 6 - 10 - Parameter Symbol min typ max Units External Audio Mode MCLK Output Timing Frequency fMCK 2.048 - 24.576 MHz Duty Cycle dMCK 40 50 60 % LRCK Output Timing Frequency fs 8 - 48 kHz Duty Cycle Duty - 50 - % BICK Output Timing Period tBCK - 1/(64fs) - ns Duty Cycle dBCK - 50 - % Audio Interface Timing BICK “ ↓” to LRCK Edge (Note 16) tMBLR −40 - 40 ns LRCK Edge to SDTO (MSB) (Except I2S mode) tLRD −70 - 70 ns BICK “ ↓” to SDTO tBSD −70 - 70 ns SDTI Hold Time tSDH 50 - - ns SDTI Setup Time tSDS 50 - - ns SPI (EEP-ROM) Control Interface Timing SK Frequency fSK - 1.5 - MHz SK Duty Cycle dSK - 50 - % EPAI Delay tCD - - 100 ns CSN Edge to SK “↑” tCSS 300 - - ns SK “↓” to CSN Edge tCSH 300 - - ns CSN “H” Time tCSW 300 - - ns EPAI Setup Time tCDS 100 - - ns EPAI Hold Time tCDH 100 - - ns One Shot Mute Timing One Shot Mute Input Width Wosm 10 - - μs Reset Timing Reset Input Width (Note 17) Wrst 1.0 - - μs Note 16. BICK rising edge must not occur at the same time as LRCK edge. Note 17. The AK5373 can be reset by the RSTN pin = “L”. |
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