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AK5373EQ Datasheet(PDF) 11 Page - Asahi Kasei Microsystems |
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AK5373EQ Datasheet(HTML) 11 Page - Asahi Kasei Microsystems |
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11 / 53 page  [ AK5373] MS1202-E-00 2010/0 6 - 11 - ■ Timing Diagrams Reset Mode PLL Clock DN DP DVDD Device Connected RSTN Tdrr min 20ms Resume min 10ms resume time resume recovery time Trst_rec Figure 2. Mode change with respect to BUS States 1 (Power on and device connected) PLL Clock D- D+ DVDD “H” Tresm Tsus_rec RSTN “H” Figure 3. Mode Change with respect to Bus States 2 (Bus transactions) 10% DVDD 90% DVDD Trs Trf DP, DN Tfs Tff Figure 4. Rise/Fall Time Vcrs DP, DN Figure 5. Crossover Point Vils Vihs DP, DN Figure 6. Schmitt Level Voltage VIL RSTN Wrst Figure 7. Power-down & Reset Timing |
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