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AK7722 Datasheet(PDF) 6 Page - Asahi Kasei Microsystems |
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AK7722 Datasheet(HTML) 6 Page - Asahi Kasei Microsystems |
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6 / 28 page  [AK7722] MS1328-E-00-PB 6 2011/09 No. Name I/O Function Classification 1 AINL3 I ADC1 Lch Single-ended Input 3 Pin. Analog Input 2 AINR2N I ADC1 Inverted Rch Differential Input 2 Pin Analog Input 3 AINR2P I ADC1 Non-inverted Rch Differential Input 2 Pin Analog Input 4 AINL2N I ADC1 Inverted Lch Differential Input 2 Pin Analog Input 5 AINL2P I ADC1 Non-inverted Lch Differential Input 2 Pin Analog Input 6 AINR1N I ADC1 Inverted Rch Differential Input 1 Pin Analog Input 7 AINR1P I ADC1 Non-inverted Rch Differential Input 1 Pin Analog Input 8 AINL1N I ADC1 Inverted Lch Differential Input 1 Pin Analog Input 9 AINL1P I ADC1 Non-inverted Lch Differential Input 1 Pin Analog Input 10 AVDD - Analog Power Supply Pin 3.0 ~ 3.6V Power Supply 11 VSS1 - Analog Ground Pin 0V Power Supply 12 LFLT O R and C Component Connect Pin for PLL Refer to “7. LFLT Pin External Connection”. This pin outputs “L” during initial reset. Analog Output 13 TESTI1 I Test 1 Pin (Internal pull-down) This pin must be connected to VSS. Test 14 GLRCKI I Frame Clock Input Pin for Voice Guidance Digital Input 15 GBICKI I Bit Clock Input Pin for Voice Guidance Digital Input 16 SDIN5 I Serial Audio Input Pin for Voice Guidance Digital Input 17 DVDD - Digital Power Supply Pin 3.0~3.6V Power Supply 18 VSS2 - Ground Pin 0V Power Supply 19 XTI I Crystal oscillator input pin Connect a crystal oscillator between this pin and the XTO pin, or input an external clock to the XTI pin. Clock 20 XTO O Crystal Oscillator Output Pin When a crystal oscillator is used, connect it between XTI and XTO. When an external clock is used, leave this pin open. During initial reset, the output of this pin is not determinable. Clock 21 GP1 O Programmable Bit Output Pin This pin outputs “L” during initial reset. Digital Output 22 JX0 I Conditional Jump Pin0 The conditional jump pin (JX0) is valid by setting control register (JX0E) to “1”. Conditional Input 23 LRCKI I LR Channel Select Clock Pin 1 LR clock should be input to this pin in slave mode. System Clock Input 24 BICKI I Serial Bit Clock Input Pin 1 BITCLOCK (48fs or 64fs) should be input to this pin in slave mode. System Clock Input 25 SDIN1 I Serial Data Input 1 Pin Digital Input SDIN2 I Serial Data Input 2 Pin Digital Input 26 JX1 I Conditional Jump Pin1 The conditional jump pin (JX1) is valid by setting control register (JX1E) to “1”. Conditional Input 27 SRLRCK1 I LR Channel Select Clock Pin 1 (for SRC) System Clock Input 28 SRBICK1 I Serial Bit Clock Input Pin 1 (for SRC) System Clock Input PIN FUNCTION |
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