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AK8131S Datasheet(PDF) 4 Page - Asahi Kasei Microsystems

Part # AK8131S
Description  Low Power Multiclock Generator with VCXO
Download  8 Pages
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Manufacturer  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK8131S Datasheet(HTML) 4 Page - Asahi Kasei Microsystems

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AK8131S
Feb-08
MS0688-E-01
- 4 -
The brand name
of AKEMD’s IC’s
DC Characteristics
All specifications at VDD: over 3.0 to 3.6V, Ta:
-20 to +85℃, 27MHz Crystal, unless otherwise noted
Parameter
Symbol
Conditions
MIN
TYP
MAX
Unit
High Level Input Voltage
VIH
Pin: S0,S1,S2
0.7VDD
V
Low Level Input Voltage
VIL
Pin: S0,S1,S2
0.3VDD
V
Input Current 1
IL1
Pin: S0,S1,S2
-20
+10
μA
Input Current 2
IL2
PIN: VIN
-3
+3
μA
High Level Output
Voltage
VOH
Pin: CLK1-4, REFOUT
IOH=-4mA
0.8VDD
V
Low level Output
Voltage
VOL
Pin: CLK1-4, REFOUT
IOL=+4mA
0.2VDD
V
Current Consumption
IDD
No load
Clock out selection by note
(1)
Ta=25℃
16.5
mA
(1) Pin setting for output clock selection: [S2:S0] = HHL
AC Characteristics
All specifications at VDD: over 3.0 to 3.6V, Ta: over -20 to +85℃, 27MHz Crystal, unless otherwise noted
(1) Measured with load capacitance of 15pF
(2) Measured with load capacitance of 25pF
(3) Pullable range depends on crystal characteristics, on-chip load capacitance, and stray capacity of PCB.
Min. ±110ppm is applied to AKEMD’s authorized test condition.
(4)
±3
σ in 1000 sampling or more
(5)
±3
σ in 5000 sampling or more
(6) Time to settle output into ±20ppm of specified frequency
Parameter
Symbol
Conditions
MIN
TYP
MAX
Unit
Crystal Clock Frequency
27.0000
MHz
VCXO Pullable Range
(3)
VIN at over 0 to VDD V
±100
Ppm
VCXO Gain
GVCXO
VIN range at 1.5V±1.0V
130
Ppm/
V
Period Jitter
(4)
CLK1-4
150
Ps
CLK1 at 74.250MHz
1000 cycle delay
0.85
ns
CLK3 at 54.000MHz
1000 cycle delay
0.5
ns
Long Term Jitter
(5)
REFOUT at 27.000MHz
1000 cycle delay
160
Ps
Pin: CLK1-3
(1)
Except 27.000MHz
45
50
55
%
Output Clock Duty
Cycle
Pin: CLK3-4,REFOUT
(2)
27.000MHz
40
50
60
%
Pin: CLK1-4
(1)
1.5
ns
Output Clock Rise Time
trise
Pin: REFOUT
(2 )
2.5
ns
Pin: CLK1-4
(1)
1.5
ns
Output Clock Fall Time
tfall
Pin: REFOUT
(2 )
2.5
ns
Power-up Time
Pin: CLK1-4
(1)
5
ms
Output Transition Time
(6)
Pin: CLK1 at
74.25 or 74.175MHz
200
µs


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