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MCM6341ZP15 Datasheet(PDF) 7 Page - Motorola, Inc |
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MCM6341ZP15 Datasheet(HTML) 7 Page - Motorola, Inc |
7 / 10 page MCM6341 7 MOTOROLA FAST SRAM WRITE CYCLE 1 (W Controlled; See Notes 1, 2, 3, and 4) P Sb l MCM6341–10 MCM6341–11 MCM6341–12 MCM6341–15 Ui N Parameter Symbol Min Max Min Max Min Max Min Max Unit Notes Write Cycle Time tAVAV 10 — 11 — 12 — 15 — ns 5 Address Setup Time tAVWL 0 — 0 — 0 — 0 — ns Address Valid to End of Write tAVWH 9 — 10 — 10 — 12 — ns Address Valid to End of Write (G High) tAVWH 8 — 9 — 9 — 10 — ns Write Pulse Width tWLWH tWLEH 9 — 10 — 10 — 12 — ns Write Pulse Width (G High) tWLWH tWLEH 8 — 9 — 9 — 10 — ns Data Valid to End of Write tDVWH 4 — 5 — 5 — 6 — ns Data Hold Time tWHDX 0 — 0 — 0 — 0 — ns Write Low to Data High–Z tWLQZ 0 5 0 6 0 6 0 7 ns 6, 7, 8 Write High to Output Active tWHQX 3 — 3 — 3 — 3 — ns 6, 7, 8 Write Recovery Time tWHAX 0 — 0 — 0 — 0 — ns NOTES: 1. A write occurs during the overlap of E low and W low. 2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus contention conditions during read and write cycles. 3. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state. 4. E1, E2, and E3 are represented by E in this data sheet. E2 is of opposite polarity to E1 and E3. 5. All write cycle timings are referenced from the last valid address to the first transitioning address. 6. Transition is measured ± 200 mV from steady–state voltage. 7. This parameter is sampled and not 100% tested. 8. At any given voltage and temperature, tWLQZ max < tWHQX min both for a given device and from device to device. DATA VALID HIGH–Z HIGH–Z tAVAV tAVWH tWHAX tWHDX tWHQX tWLWH tAVWL tDVWH tWLQZ A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) D (DATA IN) Q (DATA OUT) tWLEH WRITE CYCLE 1 (W Controlled; See Notes 1, 2, 3, and 4) |
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