2.1MHz, High-Voltage,

600mA Mini-Buck Converter

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7

Pin Description

PIN

TDFN-EP

TSSOP-EP

NAME

FUNCTION

1

1

BST

Bootstrap Capacitor for High-Side Driver (0.1μF)

2

2, 3

SUP

Voltage Supply Input. Connect a 4.7μF ceramic capacitor from SUP to PGND. Place the

capacitor very close to the SUP pin. For the TSSOP-EP package, connect both SUP pins

together for proper operation.

3

4, 5

LX

Buck Switching Node. LX is high impedance when the device is off. For the TSSOP

package, connect both LX pins together for proper operation.

4

6, 7

PGND

Power Ground. For the TSSOP-EP package, connect both PGND pins together for proper

operation.

5

8

OUTS

Buck Regulator Voltage-Sense Input. Bypass OUTS to PGND with a 10μF or larger X7R

ceramic capacitor.

6

11

PGOOD

Open-Drain Power-Good Output. External pullup resistor required for automatic SKIP

mode operation.

7

12

SYNC

Sync Input. SYNC allows the device to synchronize to other supplies. When connected

to GND or unconnected, SKIP mode is enabled under light loads. When connected to a

clock source or BIAS, forced PWM mode is enabled.

8

13

BIAS

+5V Internal Logic Supply. Connect a 2.2μF ceramic capacitor from BIAS to GND.

9

14

GND

Analog Ground

10

15

EN

Enable Input. EN is high-voltage compatible. Drive EN HIGH for normal operation.

9, 10, 16

N.C.

No Connection. Not internally connected.

EP

Exposed Pad. Connect EP to PGND. Do not use EP as the only ground connection.

MAX16904

+

5

6

OUTS

PGOOD

4

TOP VIEW

7

PGND

SYNC

3

8

LX

BIAS

2

9

SUP

GND

1

TDFN

10

BST

EN

EP

MAX16904

+

8

9

OUTS

N.C.

7

10

PGND

N.C.

6

11

PGND

PGOOD

3

14

SUP

GND

2

15

SUP

EN

1

16

BST

N.C.

5

12

LX

SYNC

4

TSSOP

13

LX

BIAS

EP

Pin Configurations