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BS616LV4017ECG55 Datasheet(PDF) 1 Page - Brilliance Semiconductor |
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BS616LV4017ECG55 Datasheet(HTML) 1 Page - Brilliance Semiconductor |
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1 / 11 page  Very Low Power CMOS SRAM 256K X 16 bit BS616LV4017 R0201-BS616LV4017 Revision 1.4 Oct. 2008 1 Pb-Free and Green package materials are compliant to RoHS FEATURES Wide VCC operation voltage : 2.4V ~ 5.5V Very low power consumption : VCC = 3.0V Operation current : 27mA (Max.) at 55ns 2mA (Max.) at 1MHz Standby current : 2/4uA (Max.) at 70/85 OC VCC = 5.0V Operation current : 65mA (Max.) at 55ns 10mA (Max.) at 1MHz Standby current : 10/20uA (Max.) at 70/85 OC High speed access time : -55 55ns(Max.) at VCC=3.0~5.5V -70 70ns(Max.) at VCC=2.7~5.5V Automatic power down when chip is deselected Easy expansion with CE and OE options I/O Configuration x8/x16 selectable by LB and UB pin. Three state outputs and TTL compatible Fully static operation Data retention supply voltage as low as 1.5V DESCRIPTION The BS616LV4017 is a high performance, very low power CMOS Static Random Access Memory organized as 262,144 by 16 bits and operates form a wide range of 2.4V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with maximum CMOS standby current of 4/20uA at Vcc=3/5V at 85 OC and maximum access time of 55/70ns. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and three-state output drivers. The BS616LV4017 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV4017 is available in DICE form, JEDEC standard 44-pin TSOP II and 48-ball BGA package. POWER CONSUMPTION POWER DISSIPATION STANDBY (ICCSB1, Max) Operating (ICC, Max) VCC=5.0V VCC=3.0V PRODUCT FAMILY OPERATING TEMPERATURE VCC=5.0V VCC=3.0V 1MHz 10MHz fMax. 1MHz 10MHz fMax. PKG TYPE BS616LV4017DC DICE BS616LV4017AC BGA-48-0608 BS616LV4017EC Commercial +0 OC to +70OC 10uA 2.0uA 9mA 39mA 63mA 1.5mA 14mA 26mA TSOP II-44 BS616LV4017AI BGA-48-0608 BS616LV4017EI Industrial -40 OC to +85OC 20uA 4.0uA 10mA 40mA 65mA 2mA 15mA 27mA TSOP II-44 PIN CONFIGURATIONS BLOCK DIAGRAM Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice. A4 A3 A2 A1 A0 CE DQ0 DQ1 DQ2 DQ3 VCC VSS DQ4 DQ5 DQ6 DQ7 WE A17 A16 A15 A14 A13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 BS616LV4017EC BS616LV4017EI 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB DQ15 DQ14 DQ13 DQ12 VSS VCC DQ11 DQ10 DQ9 DQ8 NC A8 A9 A10 A11 A12 G H F E D C B A 1 2 3 4 5 6 A9 A11 A10 NC A12 A14 A13 A15 WE D13 D5 D7 D6 A17 A16 A7 VSS VCC D12 D11 D4 D3 NC A5 OE A3 A0 A6 A4 A1 A2 NC UB D10 D1 CE D2 D0 48-ball BGA top view LB D8 D9 VSS VCC D14 D15 NC NC A8 Address Input Buffer Row Decoder Memory Array 1024 x 4096 Column I/O Write Driver Sense Amp Column Decoder Address Input Buffer A14 A16 A0 A1 Data Input Buffer Control DQ0 . . . . . . DQ15 A12 A11 A10 A9 A8 A5 A6 A7 A4 A3 16 16 16 16 8 256 4096 1024 10 A13 Data Output Buffer A15 CE WE OE UB LB VCC VSS A2 . . . . . . A17 |
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