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TRF7960A Datasheet(PDF) 6 Page - Texas Instruments |
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TRF7960A Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 68 page  TRF7960A SLOS732 – JUNE 2011 www.ti.com Table 2-1. Terminal Functions (continued) Terminal Type(1) Description Name No. I/O_1 18 BID I/O pin for parallel communication I/O_2 19 BID I/O pin for parallel communication I/O_3 20 BID I/O pin for parallel communication I/O pin for parallel communication I/O_4 21 BID Slave select signal in SPI mode I/O pin for parallel communication I/O_5 22 BID Data clock output in Direct Mode 1 I/O pin for parallel communication I/O_6 23 BID MISO for serial communication (SPI) Serial bit data output in Direct Mode 1 or subcarrier signal in Direct Mode 0 I/O pin for parallel communication. I/O_7 24 BID MOSI for serial communication (SPI) Selection of power down mode. If EN2 is connected to VIN, then VDD_X is active during power EN2 25 INP down mode 2 (for example, to supply the MCU). DATA_CLK 26 INP Data clock input for MCU communication (parallel and serial) If EN = 1 (EN2 = don't care) the system clock for the MCU is configured with register 0x09 (off, 3.39 SYS_CLK 27 OUT MHz, 6.78 MHz, or 13.56 MHz). If EN = 0 and EN2 = 1, the system clock is set to 60 kHz EN 28 INP Chip enable input (If EN = 0, then the chip is in sleep or power-down mode) VSS_D 29 SUP Negative supply for internal digital circuits OSC_OUT 30 OUT Crystal or oscillator output OSC_IN 31 INP Crystal or oscillator input Internally regulated supply (2.7 V to 3.4 V) for digital circuit and external devices (for example, an VDD_X 32 OUT MCU) PAD PAD SUP Chip substrate ground 6 Physical Characteristics Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TRF7960A |
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