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HEF4052BTT Datasheet(PDF) 10 Page - NXP Semiconductors |
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HEF4052BTT Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 22 page HEF4052B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 8 — 17 November 2011 10 of 22 NXP Semiconductors HEF4052B Dual 4-channel analog multiplexer/demultiplexer 11. Dynamic characteristics Fig 12. Typical RON as a function of input voltage VI (V) 015 510 001aae648 200 300 100 400 RON ( Ω) 0 VDD = 5 V 10 V 15 V Table 8. Dynamic characteristics Tamb = 25 C; VSS = VEE = 0 V; for test circuit see Figure 16. Symbol Parameter Conditions VDD Typ Max Unit tPHL HIGH to LOW propagation delay nYn, nZ to nZ, nYn; see Figure 13 5 V 1020ns 10 V 5 10 ns 15 V 5 10 ns Sn to nYn, nZ; see Figure 14 5 V 150 305 ns 10 V 65 135 ns 15 V 50 100 ns tPLH LOW to HIGH propagation delay Yn, nZ to nZ, nYn; see Figure 13 5 V 1020ns 10 V 5 10 ns 15 V 5 10 ns Sn to nYn, nZ; see Figure 14 5 V 150 300 ns 10 V 75 150 ns 15 V 50 100 ns tPHZ HIGH to OFF-state propagation delay E to nYn, nZ; see Figure 15 5 V 95 190 ns 10 V 90 180 ns 15 V 85 180 ns tPZH OFF-state to HIGH propagation delay E to nYn, nZ; see Figure 15 5 V 130 260 ns 10 V 55 115 ns 15 V 4585ns tPLZ LOW to OFF-state propagation delay E to nYn, nZ; see Figure 15 5 V 100 205 ns 10 V 90 180 ns 15 V 90 180 ns |
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