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NX5DV713 Datasheet(PDF) 11 Page - NXP Semiconductors |
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NX5DV713 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 20 page NX5DV713 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 24 November 2011 11 of 20 NXP Semiconductors NX5DV713 Dual supply 1-of-2 VGA switch Test data is given in Table 11. Definitions: DUT = Device Under Test. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including test jig and probe. RL = Load resistance. Fig 9. Test circuit for measuring propagation delay times (SEL to H1, H2, V1, V2) 001aan183 VCC VI VO DUT CL RT G RL Table 11. Test data Input Load tr, tf CL RL 2.5 ns 10 pF 1 k Measurement points are given in Table 10. Logic level: VOH is typical output voltage level that occurs with the output load. Fig 10. Enable and disable times VI VM VX tdis tdis ten ten VX VX VX VM VOH GND SEL input output OFF to HIGH HIGH to OFF output HIGH to OFF OFF to HIGH GND VOH GND aaa-001602 |
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