8 PIN SOP HIGH SPEED 1Mbit/s

TRANSISTOR PHOTOCOUPLER

Everlight Electronics Co., Ltd.

8

http://www.everlight.com

Document No

：DPC-0000089

Rev.1

March 1, 2011

EL045X EL050X series

Note:

*3 Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the

leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high

state (i.e., VO > 2.0V).

Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the

trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low

state (i.e., VO < 0.8V).

Figure 8 Switching Time Test Circuit & Waveform

Figure 9 Transient Immunity Test Circuit & Waveform